Atmel AT91CAP9-STK User Manual
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Atmel AT91CAP9-STK User Manual

Atmel AT91CAP9-STK User Manual

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AT91CAP9-STK Starter Kit
....................................................................................................................
User Guide
6351B–CAP–27-Jun-08

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Summary of Contents for Atmel AT91CAP9-STK

  • Page 1 AT91CAP9-STK Starter Kit ........................User Guide 6351B–CAP–27-Jun-08...
  • Page 2 AT91CAP9-STK Starter Kit User Guide 6351B–CAP–27-Jun-08...

  • Page 3: Table Of Contents

    2.3.14 EI14: Two 64-lead Extension Connectors for the FPGA I/O Lines ....2-10 Characteristics ......................... 2-12 2.4.1 Functional Characteristics ................. 2-12 2.4.2 Physical Characteristics..................2-29 Section 3 Board Strap and Switch Configuration ............... 3-1 Connectors 1x2........................3-1 Connectors 1x3........................3-2 AT91CAP9-STK Starter Kit User Guide 6351B–CAP–27-Jun-08...
  • Page 4 Switches..........................3-3 Section 4 AT91CAP9-STK Schematics ..................4-1 This section contains the following appended schematics..........4-1 Section 5 Revision History......................5-1 Revisioin Hisory ......................... 5-1 1-ii AT91CAP9-STK Starter Kit User Guide 6351B–CAP–27-Jun-08...

  • Page 5: Introduction

    Section 1 Introduction Purpose ® This document is a presentation of the hardware associated with the AT91CAP9-STK Starter Kit. This product is derived from the Atmel AT91CAP9-MZ and AT91CAP9-MB demonstration boards. ™ Starter Kit Board The AT91CAP9-STK Starter Kit is built on a single PCB, including: ™...

  • Page 6: Cap Starter Kit Development Tools

    Evaluation mezzanine board ORCAD schematics 20061122_09H00_AT91CAP9_MEZ.dsn Evaluation mezzanine board BOM 20061207_ID2399_BOMASSY_MEZZANINE.xls Atmel Specification New Specification CAP9 Starter Kit CAP9-STK hardware description.doc ref. 4658D03 CAP9-STK ORCAD schematics ref. ADEC101389001 CAP9-STK BOM ref. ADEC101389003 CAP9-STK equipment plan ref. ADEC101389EQ2 AT91CAP9-STK Starter Kit User Guide 6351B–CAP–27-Jun-08...

  • Page 7: Glossary

    Customizable Microcontroller-based SoC Platform CAP9-STK CAP9 Starter Kit FPGA Field Programmable Gate Array Input/Output Multimedia Card Interface Metal Programmable Block MPIO Metal Programmable I/O Not Connected OHCI Open Host Controller Interface Phase Locked Loop Power Management Circuit AT91CAP9-STK Starter Kit User Guide 6351B–CAP–27-Jun-08...

  • Page 8: Requirements

    It does not allow a full emulation of a customized version of the CAP9, but is intended to familiarize the user with the customization concept and architecture of the CAP9. It also demonstrates the operations of the analog companions provided by Atmel’s AT73C family of products and the availability of the operating systems and software layers.

  • Page 9: Interface And Function General Overview

    Requirements Interface and Function General Overview AT91CAP9-STK interfaces and functions are as follows: (Refer also to Figure 2-1 on page 2-3.) Interface EI1: 1 external Lithium-Ion battery EI2: 5V AC/DC sector adapter EI3: 1 RMII 10/100 Base-T Ethernet EI4: 1 Serial port, connected to the Debug Unit...
  • Page 10 Requirements Figure 2-1. AT91CAP9-STK Interface and Function Overview 40-pin FPC ZIF 1.2V VDDBU Coin Cell (E18) VBACKUP 3V Battery Holder AT73C239 2.75V (EI12) (F12) 2x1.8V Prototyping Areas 3.3V (F15) Touch Screen Controller & LCD Panel Power Supply (F6) 3.3V LTC3412 1.8V...

  • Page 11: External Interfaces

    Requirements External Interfaces 2.3.1 EI1: External Lithium-ion Battery The AT91CAP9-STK board implements one external Li-Ion battery 3-pin HE14 type connector.. Table 2-1. HE 14-3 Pinout Signal Name Description Type Level VBAT Battery power 4,5V Electrical ground Thermistor BAT_TS 4,5V temperature sense 2.3.2...

  • Page 12: Ei5: Sd Card Slot

    Requirements 2.3.5 EI5: SD Card Slot The AT91CAP9-STK board implements a 12-pin short type SDCARD slot on the bottom side. Table 2-4. SD CARD Pinout Signal Name Description Type Level MCI_DA3 Data 3 3.3V MCI_CDA Command/response I/O open-drain 3.3V Electrical ground 3.3V power supply...

  • Page 13: Ei8: 1/4 Vga Lcd Panel With Touch Screen

    2.3.8 EI8: 1/4 VGA LCD Panel with Touch Screen The AT91CAP9-STK board implements a 0.5 FPC, 40-pin ZIF LCD Panel connector, with contact on the bottom side. The connector integrates two additional pins (MC1, MC2) for signal shielding. Table 2-7. 40-pin ZIF Connector Pinout...

  • Page 14: Ei9: Audio Stereo Headset

    A headset audio interface connector is available for a 3.5 phone jack stereo plug. SMT 1503-03 Lumberg is used. 2.3.10 EI10: Analog Inputs The AT91CAP9-STK board implements a 3.81mm-pitch Phoenix MKDS 6-pin terminal block. This con- nector receives four analog inputs. Table 2-8. MKDS 6-pin Terminal Block Pinout Signal Name...

  • Page 15: Ei12: Manganese-Lithium Coin Battery

    Electrical ground 2.3.12 EI12: Manganese-Lithium Coin Battery The AT91CAP9-STK board implements a coin cell battery holder for 12 mm rechargeable 3V Manga- nese-Lithium coin battery, Panasonic ML1220 type. 3V non-rechargeable Lithium coin batteries are not supported. AT91CAP9-STK Starter Kit User Guide...

  • Page 16: Ei13: 64-Lead Extension Connector For The At91Cap9 I/O Lines

    3.3V or 1.8V 3.3V 3.3V PC12 3.3V PC29 3.3V PC13 3.3V 3.3V PD5/DMARQ2 3.3V 3.3V PD6/NWAIT 1.8V PD8/NCS5 1.8V PD7/NCS4 1.8V PD10/SCK1 1.8V PD9/SCK2 1.8V PD13/A24 1.8V PD12/A23 1.8V PD14 / A25 1.8V 1V8_CAP9 1,8V AT91CAP9-STK Starter Kit User Guide 6351B–CAP–27-Jun-08...

  • Page 17: Ei14: Two 64-Lead Extension Connectors For The Fpga I/O Lines

    BANK6 FPGA_IO38 BANK6 FPGA_IO39 BANK6 FPGA_IO40 BANK6 FPGA_IO41 BANK6 FPGA_IO42 BANK6 FPGA_IO43 BANK6 FPGA_IO44 BANK6 FPGA_IO45 BANK6 FPGA_IO46 BANK6 FPGA_IO47 BANK6 FPGA_IO48 BANK6 FPGA_IO49 BANK6 FPGA_IO50 BANK6 VCCIO6 BANK6 FPGA_IO51 BANK6 VCCIO6 BANK6 2-10 AT91CAP9-STK Starter Kit User Guide 6351B–CAP–27-Jun-08...
  • Page 18 FPGA_IO BANK7 VCCIO8 BANK8 FPGA_IO BANK7 VCCIO8 BANK8 FPGA_IO BANK8 FPGA_IO BANK8 FPGA_IO BANK8 FPGA_IO BANK8 FPGA_IO BANK8 FPGA_IO BANK8 FPGA_IO BANK8 FPGA_IO BANK8 FPGA_IO BANK8 FPGA_PLLOUTp 3.3V FPGA_IO BANK8 FPGA_PLLOUTn 3.3V 3.3V AT91CAP9-STK Starter Kit User Guide 2-11 6351B–CAP–27-Jun-08...

  • Page 19: Characteristics

    Characteristics 2.4.1 Functional Characteristics 2.4.1.1 F1: AT91CAP9 Microcontroller The AT91CAP9-STK microcontroller core block implements the necessary digital-system core functions. It's composed of the following elements: ® One 32-bit-ARM9 AT91CAP9 microcontroller core and its power supplies (see below). One 1.8V, 512 Mbytes, 8-bit NAND Flash, One 1.8V, 64 Mbytes, 32-bit SDRAM Application Volatile Memory...
  • Page 20 1.2V core power supply, 3.3V or 1.8V I/O bank power supplies, 484-pin FBGA, -5 speed grade. The FPGA aims to emulate the logic to be implemented in the MPB through 5 metal layers. The FPGA also manages the EI14 interface. AT91CAP9-STK Starter Kit User Guide 2-13 6351B–CAP–27-Jun-08...
  • Page 21 Each of the six FPGA PLL blocks have two power supply pins: VCCA_PPLw and VCCD_PPLx (x = from to 6). Table 2-17. FPGA PLL Block Power Supply PLL Supply Pin Name Power Supply VCCA_PPL1 VCC_PLL12 VCCA_PPL2 VCC_PLL12 VCCA_PPL3 VCC_PLL34 VCCA_PPL4 VCC_PLL34 VCCA_PPL5 VCC_PLL56 2-14 AT91CAP9-STK Starter Kit User Guide 6351B–CAP–27-Jun-08...
  • Page 22 1V2_CAP9 VCCD_PPL3 1V2_CAP9 VCCD_PPL4 1V2_CAP9 VCCD_PPL5 1V2_CAP9 VCCD_PPL6 1V2_CAP9 VCC_PLL12, VCC_PLL34, VCC_PLL56 are 1V2 (1V2_CAP9) ferrite isolated power supplies as shown below (VCC_PLL12 example): BLM1 8PG600 VCC_PLL12 C224 C225 C226 C227 100nF 100nF AT91CAP9-STK Starter Kit User Guide 2-15 6351B–CAP–27-Jun-08...
  • Page 23 CLK10p/DIFFIO_RX_C3p CLK7n CLK0n/DIFFIO_RX_C0n CLK12n CLK2n/DIFFIO_RX_C1n CLK13n CLK8n/DIFFIO_RX_C2n CLK14n R212 CLK10n/DIFFIO_RX_C3n CLK15n VCCIO7 PLL_ENA R220 R215 AB10 FPGA_PLLOUTp PLL5_OUT0p PLL6_OUT0p PLL5_OUT1p PLL6_OUT1p AA10 FPGA_PLLOUTn PLL5_OUT0n PLL6_OUT0n PLL5_OUT1n PLL6_OUT1n R221 PLL5_FBp/OUT2p PLL6_FBp/OUT2p PLL5_FBn/OUT2n PLL6_FBn/OUT2n EP2S15F484 2-16 AT91CAP9-STK Starter Kit User Guide 6351B–CAP–27-Jun-08...
  • Page 24 EMIRQ# LED4 YELLOW The 1.8V core power supply is external by default, to minimize 3.3V power consumption. Use of LAN8700 3.3V/1.8V internal regulator can be done by disconnected J36 and R71 REG_OFF Pull- AT91CAP9-STK Starter Kit User Guide 2-17 6351B–CAP–27-Jun-08...
  • Page 25 C147 10uF_1210 100nF 100nF 10uF_1210 R223 R224 HDMB D+IN D+OUT HDMA D+OUT D+IN FIX4 FIX3 FIX2 FIX1 HDP B C148 C149 D-IN D-OUT HDP A 100nF 100nF NUF2101MT1G D-OUT D-IN R226 NUF2101MT1G R225 2-18 AT91CAP9-STK Starter Kit User Guide 6351B–CAP–27-Jun-08...
  • Page 26 VREF VCC_ADS R133 TP22 R130 4,7µH 220mA 100K VREF_ADS TP18 TP19 ADS7843E C170 C171 C172 TP21 TP20 C169 10uF_1210 pin 1 pin 10 pin 9 The LCD panel controlled the AT91CAP9 LCD Controller. AT91CAP9-STK Starter Kit User Guide 2-19 6351B–CAP–27-Jun-08...
  • Page 27 J54 jumper J55 jumper AT91CAP9 Name Position Position Position Position ADC Name ADC1 1-2 (default) ADC1 ADC2 1-2 (default) ADC2 ADC3 1-2 (default) ADC3 ADC4 1-2 (default) ADC4 The implementation is shown below 2-20 AT91CAP9-STK Starter Kit User Guide 6351B–CAP–27-Jun-08...
  • Page 28 ANALOG_I1 ANALOG_I2 ANALOG_I3 ANALOG_I4 MKDS-1/6-3.81 BAT54SLT1G VDDANA R116 R117 U13C 1X3PTS_MD_2MM54 PB19 PB15 ADC3 ADC3 R118 100K AD8040ARZ BAT54SLT1G VDDANA U13D AD8040ARZ VDDANA R119 1X3PTS_MD_2MM54 PB20 PB16 ADC4 C165 ADC4 R120 100nF 100K AT91CAP9-STK Starter Kit User Guide 2-21 6351B–CAP–27-Jun-08...
  • Page 29 10UF_16V SI5515DC VBAT The different power supplies of the board are provided by two AT73C224 chips from the Atmel family of AT73 products (controlled by the AT91CAP9 TWI bus) and one LTC3412 as shown below: 2-22 AT91CAP9-STK Starter Kit User Guide...
  • Page 30 VIN_PMC_SHDN VDD2 1V2_CAP9 VDDRTC 1V2_SW 2 4,7 uF_16V 6µH8_710mA 1UF_16 V 1V2_SW 2 XOUT GND2 R140 1V2_CAP9 CK32 33UF_10V TP64 TWCK CAP9_POK VINT 3V3_ITB VCAPP EN_PMC 100nF R168 470nF VCAPN GND/AVSS 2200pF AT73C224 AT91CAP9-STK Starter Kit User Guide 2-23 6351B–CAP–27-Jun-08...
  • Page 31 The implementation of the switch is shown below: VIN_PMC VIN_PMC_SHDN R141 R142 10nF 100K 100K 100nF SI5515DC SI5515DC SHDN No external pull-up is required on the SHDN signal (even at start-up). 2-24 AT91CAP9-STK Starter Kit User Guide 6351B–CAP–27-Jun-08...
  • Page 32 Requirements 2.4.1.11 F11: Battery Charger An Atmel AT73C205 stand alone battery charger is implemented on the board. It manages the charge of an external Li-Ion battery plugs on the EI1 interface, from 5V AC/DC sector adapter or VBUS USB Device external power source.
  • Page 33 RESET_CAP9: AT91CAP9 microcontroller reset signal (active low) NTRST: test reset (active low) RESET_FPGA: FPGA reset signal, it drives the nCONFIG signal of the FPGA (active low) RST_SOFT_FPGA: FPGA reset from AT91CAP9 microcontroller (active high) 2-26 AT91CAP9-STK Starter Kit User Guide 6351B–CAP–27-Jun-08...
  • Page 34 Three ways can be used to program the FPGA EPCS16 serial device. Serial device configuration port The FPGA EPCS16 serial device configuration can be programmed via the EI11 serial device configura- tion port with Altera USB Blaster probe. Altera SFL (Serial Flash Loader) function AT91CAP9-STK Starter Kit User Guide 2-27 6351B–CAP–27-Jun-08...
  • Page 35 The second one is a 10x8 points, 2.54 mm-pitch matrix, with two 1x4points, 2.54 mm-pitch line, connected to 5V and 3.3V added on top of the matrix, and 1x8 points, 2.54 mm-pitch line, connected to GND added on the bottom of the matrix. 2-28 AT91CAP9-STK Starter Kit User Guide 6351B–CAP–27-Jun-08...

  • Page 36: Physical Characteristics

    The power supply of the board with adaptors for Europe, United Kingdom, China and United States A set of communication cables, including cables for USB, Ethernet and serial port. A manganese-lithium 3V rechargeable coin battery AT91CAP9-STK Starter Kit User Guide 2-29 6351B–CAP–27-Jun-08...

  • Page 37: Board Strap And Switch Configuration

    1V2 is off. DDUTMIC DDUTMIC supply by 3V3 is off. DDUTMII DDUTMII supply by 3V3 filtered is off. DDANA DDANA Chip select audio DAC (U12) by CAP9 The audio DAC (U12) not selected. AT91CAP9-STK Starter Kit User Guide 6351B–CAP–27-Jun-08...

  • Page 38: Connectors 1X3

    TDO ICE port signal is FPGA TDO signal (with J60 on 1-2). FPGA JTAG port TDO signal is FPGA JTAG TDO signal. FPGA TDI JTAG signal is CAP9 TDO signal (with J59 on FPGA JTAG TDI signal is FPGA JTAG port TDI signal. 2-3). AT91CAP9-STK Starter Kit User Guide 6351B–CAP–27-Jun-08...

  • Page 39: Switches

    PIO (allows hibernate mode). AT73C239 TWCK signal is VIN_SURV_AT73C239 AT73C239 TWD signal is CAP9 I2C bus TWD signal. power supply. AT73C239 V power supply is VIN_AT73C239 power AT73C239 V power supply is V BACKUP supply. AT91CAP9-STK Starter Kit User Guide 6351B–CAP–27-Jun-08...
  • Page 40 Board Strap and Switch Configuration AT91CAP9-STK Starter Kit User Guide 6351B–CAP–27-Jun-08...

  • Page 41: At91Cap9-Stk Schematics

    EBI and PIO System USB Clock FPGA Power FPGA IO Bank FPGA IO Bank FPGA Clock and Configuration Debug Ethernet SMSC USB Host and Device Audio Analog LCD and TSC SDCARD SDRAM, NAND and DataFlash AT91CAP9-STK Starter Kit User Guide 6351B–CAP–27-Jun-08...
  • Page 42 PAGE 01 : TITLE PAGE 02 : TOP VIEW PAGE 03 : BATTERY CHARGER & BACKUP PAGE 04 : PMC AT73C224 PAGE 05 : POWER SWITCH & RESET PAGE 06 : FPGA CORE SUPPLY PAGE 07 : IO CONNECTORS & PROTO AREA PAGE 08 : CAP9 POWER PAGE 09 : EBI &...
  • Page 43 03 - AT91CAP9 D[0..15] D[0..15] 01 - POW ER SUPPLY D[16..31] 1V8_CAP9 D[16..31] 09 - MEMORY A[0..17] 1V2_CAP9 A[0..17] A[18..25] VDDANA 02 - IO CONNECTORS & PROTO AREA VDDANA A[18..25] VDD_IO TW CK TWCK D[0..31] TW D 1V8_CAP9 VDDIOP1 VDDIOM 1V8_CAP9 VDDIOP1 D[0..31]...
  • Page 44 5VDC_SECTOR Battery Charger & Backup 1V2_SAVE 1V2_SAVE 100nF 100nF 10uF_1210 10uF_1210 100UF_10V 100UF_10V R173 R173 5VDC_SECTOR CHARGE STATE LED1 LED2 BATTERY CHARGER VBUS Time out or Battery Absent 10UF_16V 10UF_16V Charge complete 100nF 100nF 10uF_1210 10uF_1210 Charge progressing R172 R172 Low Power Supply VBAT 10uF_1210...
  • Page 45 AT73C224 PMC Power Supplies Si5515DC Si5515DC VIN_PMC_SHDN VIN_PMC VIN_PMC_SHDN 1V8_CAP9 1V8_CAP9 6,8uH_2A4 6,8uH_2A4 1UF_16V 1UF_16V 1V8_FPGA 1V8_FPGA 100nF 100nF R176 R176 1V2_CAP9 1V2_CAP9 1UF_16V 1UF_16V 10nF 10nF 1UF_16V 1UF_16V 10nF 10nF C206 C206 1V2_USB 1V2_USB pin 2 pin 23 0R05_2512 0R05_2512 6,8uH_2A4 6,8uH_2A4...
  • Page 46 Power Switch & Reset SWITCH 5VDC_SECTOR - VBAT VIN_PMC R229 R229 5VDC_SECTOR 5VDC_SECTOR MBRS340T3G MBRS340T3G 5VDC_SECTOR R240 R240 150UF_10V 150UF_10V 332R 332R RAPC722 RAPC722 GREEN GREEN VIN LED SI5515DC SI5515DC VBAT RESET CONTROL RESET CONFIG jumper jumper NRST Uncontroled reset then start CAP9 and FPGA order Reset CAP9 resets FPGA, start CAP9 and then start FPGA Reset FPGA resets CAP9, start FPGA and then start CAP9 Forbidden (no reset available)
  • Page 47 FPGA Core Supply VIN_PMC_SHDN 1V2_FPGA 1V2_FPGA VIN_PMC_SHDN R169 R169 R159 R159 FPGA_POK PGOOD 1V2_FPGA TP65 TP65 1uH_1A8 1uH_1A8 B82470-A1102-M B82470-A1102-M SW14 SW15 C195 C195 SW11 1V8_FPGA 22uF_1210 22uF_1210 C196 C196 C197 C197 R158 R158 SW10 1UF_16V 1UF_16V 220pF 100V 220pF 100V RUN/SS C198 C198...
  • Page 48 CAP9 & FPGA PIO Connectors 1V8_CAP9 1V8_CAP9 VDDIOP1 VDDIOP1 VCCIO4 VCCIO4 FPGA_IO[0..95] VCCIO6 VCCIO6 FPGA_IO[0..95] PA[0..31] TP66 TP66 PA[0..31] VCCIO7 VCCIO7 PB[0..31] VCCIO8 VCCIO8 PB[0..31] PC[0..31] PC[0..31] PD[0..12] CAP9 PIO CONNECTOR FPGA PIO CONNECTORS PD[0..12] VCCIO4 VCCIO6 SPI0_SPCK FPGA_IO0 FPGA_IO52 SPI0_MISO FPGA_IO1 FPGA_IO2...
  • Page 49 CAP9 - Power supply VDDCORE 1 capacitor close to each VDDCORE VDDIOP1 VDDIOP1 1V2_SAVE 1V2_SAVE 10nF 10nF 10nF 10nF 10nF 10nF 10nF 10nF 10nF 10nF 10nF 10nF 10nF 10nF 10nF 10nF 10nF 10nF 10nF 10nF 10nF 10nF 10nF 10nF 10nF 10nF 1V2_USB 1V2_USB...
  • Page 50 CAP9 - Busses BA[0..1] A[0..17] A[0..17] NBS0 NBS[0..3] NBS1 NBS2 PA[0..31] PB[0..31] NBS3 A[18..25] A[18..25] CAP9 - PIOB CAP9 - PIOB CAP9 - PIOA CAP9 - PIOA PB0/TF0 CAP9 - EBI CAP9 - EBI D[0..15] PA0/MCI0_D0/SPI0_MISO PB1/TK0 BCCLK PA1/MCI0_CD/SPI0_MOSI PB2/TD0 CASO SPCK0 CAS/BCOE...
  • Page 51 CAP9 - USB, PLL, ICE TCK_ICE 100K 100K 100K 100K 100K 100K 100K 100K TMS_ICE NTRST TDI_ICE RTCK TDO_ICE HE10_2X10PTS_MC HE10_2X10PTS_MC NRST NRST VDDBU CAP9 - SYSTEM & USB CAP9 - SYSTEM & USB HSDM HSDM HSDM NTRST ICE connector FSDM 100K 100K...
  • Page 52 FPGA Power VDDMPIO VDDMPIO PLL POWER SUPPLY VCCIO4 VCCIO4 VCCIO6 VCCIO6 VCCIO7 VCCIO7 2,2uH_600mA 2,2uH_600mA 2,2uH_600mA 2,2uH_600mA VCCIO8 VCCIO8 VCC_PLL12 VCC_PLL56 JTAG POWER SUPPLY C224 C224 C225 C225 C226 C226 C227 C227 C291 C291 C228 C228 C229 C229 C230 C230 C231 C231 100nF...
  • Page 53 FPGA IO Bank MPIOA[0..31] MPIOA[0..31] MPIOB24 MPIOB24 MPIOB[0..44] MPIOB[0..44] MPIO BUS FPGA_IO[0..95] FPGA_IO[0..95] U19B U19B U19E U19E U19A U19A BANK1 BANK1 BANK2 BANK2 BANK5 BANK5 MPIOA0 MPIOB0 MPIOB25 MPIOB5 MPIOB17 IO_VREFB1N0_R19 IO_VREFB2N0_C22 IO_VREFB2N0_D21 IO_VREFB5N1_J8 IO_VREFB5N0_L8 MPIOA1 MPIOB18 MPIOB26 MPIOB6 MPIOB1 IO_VREFB1N0_R22 IO_VREFB2N0_F19 IO_VREFB2N1_K18...
  • Page 54 FPGA Clock & Configuration R216 R216 nCE_CAP9 R217 R217 nCSO 1X3PTS_MD_2MM54 1X3PTS_MD_2MM54 nCSO_CAP9 C292 C292 C276 C276 C277 C277 C278 C278 R218 R218 TMS_BYTEB TMS_ICE 1UF_16V 1UF_16V 10nF 10nF 10nF 10nF 10nF 10nF DCLK DCLK_CAP9 R219 R219 JTAG ASDO_FPGA ASDO_CAP9 U19J U19J OPTIONS...
  • Page 55 Serial Debug Port C119 C119 100nF 100nF R153 R153 C121 C121 100nF 100nF C120 C120 SUBD9_M_C SUBD9_M_C 100nF 100nF C122 C122 C123 C123 100nF 100nF 100K 100K 100nF 100nF DTXD DRXD TP67 TP67 R154 R154 ADM3202ARNZ ADM3202ARNZ 2, Chemin du Ruisseau BP 121 2, Chemin du Ruisseau BP 121 2, Chemin du Ruisseau BP 121 Projet / Project...
  • Page 56 10/100 RMII SMSC Ethernet VDDIO_ETH VDDIO_ETH VDDIO_ETH VDDIO_ETH 3V3_ANA_ETH BLM18PG600 BLM18PG600 C131 C131 C132 C132 C133 C133 C134 C134 C135 C135 C136 C136 C137 C137 C138 C138 C139 C139 C140 C140 C141 C141 10nF 10nF 10nF 10nF 330pF 330pF 10UF_0805 10UF_0805 100nF 100nF...
  • Page 57 USB Interfaces USB HOST INTERFACE 0A5_13V2 0A5_13V2 0A5_13V2 0A5_13V2 C144 C144 C145 C145 C146 C146 C147 C147 10uF_1210 10uF_1210 100nF 100nF 100nF 100nF 10uF_1210 10uF_1210 R223 R223 R224 R224 HDMB D+IN D+IN D+OUT D+OUT HDMA D+OUT D+OUT D+IN D+IN HDPB D-IN D-IN D-OUT...
  • Page 58 Audio DAC R107 R107 100K 100K PAINN SPI_DOUT MISO VBAT SPI_DIN MOSI SPCK SPI_CLK AUDIO_CS# SPI_CSB LPHN SMODE RSTB RESET# VCC_DAC PAINP MONOP VDIG 4,7uH 220mA 4,7uH 220mA MONON VCC_DAC AVDD C158 C158 C154 C154 C155 C155 LINER C156 C156 C157 C157 10UF_0805...
  • Page 59 Analog Inputs VDDANA VDDANA BAT54SLT1G BAT54SLT1G VDDANA R112 R112 U13A U13A ADC1 R113 R113 100K 100K AD8040ARZ AD8040ARZ BAT54SLT1G BAT54SLT1G VDDANA R114 R114 U13B U13B ADC2 R115 R115 100K 100K AD8040ARZ AD8040ARZ ANALOG_I1 ANALOG_I2 ANALOG_I3 ANALOG_I4 MKDS-1/6-3.81 MKDS-1/6-3.81 BAT54SLT1G BAT54SLT1G VDDANA R116 R116...
  • Page 60 LCD Connector & Touch Screen Controller 3.5-inch 1/4 VGA TFT LCD DISPLAY TX09D70VM1CCA TX09D70VM1CCA X_RIGHT C166 C166 R121 R121 Y_LOW X_LEFT R122 R122 Y_UP VCTRL LCDD18 LCDD19 R123 R123 LCDD20 LCDD21 LCDD22 LCDD23 B[0..5] LCDD10 LCDD11 LCDD12 LCDD13 LCDD14 LCDD15 G[0..5] LCDFIX LCDFIX...
  • Page 61 SDCARD Interface R227 R227 R134 R134 C173 C173 3K3_1% 3K3_1% 10nF 10nF R135 R135 (PC21/LCDD17/E_TX3) MCI_CD (PA19/MCI1_D1/ISI_D3) MCI_DA1 (PA18/MCI1_D0/ISI_D1) MCI_DA0 (PA16/MCI1_CK/ISI_D0) MCI_CK (PA17/MCI1_CD/ISI_D1) MCI_CDA (PA21/MCI1_D3/ISI_D5) MCI_DA3 (PA20/MCI1_D2/ISI_D4) MCI_DA2 FPS009-3202BL FPS009-3202BL 2, Chemin du Ruisseau BP 121 2, Chemin du Ruisseau BP 121 2, Chemin du Ruisseau BP 121 Projet / Project Projet / Project...
  • Page 62 VDD_IO VDD_IO SDRAM & Flash Memories VDD_MEM VDD_MEM VDD_MEM 2Gb NAND FLASH VDD_MEM VDD_MEM C188 C188 C189 C189 10nF 10nF 10nF 10nF R136 R136 R233 R233 100K 100K VDD_MEM 64Mo SDRAM FN_R/B# RY/BY FN_RE# FN_CE# TP23 TP23 FN_CLE FN_ALE FN_W E# A[2..15] D[0..31] A[2..15]...

  • Page 63: Revision History

    Section 5 Revision History Revision Hisory Change Request Document Comments 6351A First Issue Section ”AT91CAP9-STK Schematics” on page 4-1 updated 6351B 5606 Section 1.2 on page 1-1 , removed ‘”A” from AT91CAP9-STK AT91CAP9-STK Starter Kit User Guide 6351B–CAP–27-Jun-08...
  • Page 64 Disclaimer: The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to any intellectual property right is granted by this document or in connection with the sale of Atmel products. EXCEPT AS SET FORTH IN ATMEL’S TERMS AND CONDI- TIONS OF SALE LOCATED ON ATMEL’S WEB SITE, ATMEL ASSUMES NO LIABILITY WHATSOEVER AND DISCLAIMS ANY EXPRESS, IMPLIED OR STATUTORY...

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