Pin Configurations
Disclaimer
ATmega8535(L)
2
Figure 1. Pinout ATmega8535
(MOSI) PB5
1
(MISO) PB6
2
(SCK) PB7
3
RESET
4
VCC
5
GND
6
XTAL2
7
XTAL1
8
(RXD) PD0
9
(TXD) PD1
10
(INT0) PD2
11
Typical values contained in this data sheet are based on simulations and characteriza-
tion of other AVR microcontrollers manufactured on the same process technology. Min
and Max values will be available after the device is characterized.
(XCK/T0) PB0
(T1) PB1
(INT2/AIN0) PB2
(OC0/AIN1) PB3
(SS) PB4
(MOSI) PB5
(MISO) PB6
(SCK) PB7
RESET
VCC
GND
XTAL2
XTAL1
(RXD) PD0
(TXD) PD1
(INT0) PD2
(INT1) PD3
(OC1B) PD4
(OC1A) PD5
(ICP1) PD6
33
PA4 (ADC4)
(MOSI) PB5
32
PA5 (ADC5)
(MISO) PB6
31
PA6 (ADC6)
(SCK) PB7
30
PA7 (ADC7)
29
AREF
28
GND
27
AVCC
26
PC7 (TOSC2)
25
PC6 (TOSC1)
(RXD) PD0
24
PC5
(TXD) PD1
23
PC4
(INT0) PD2
NOTE: MLF Bottom pad should be soldered to ground.
PA0 (ADC0)
PA1 (ADC1)
PA2 (ADC2)
PA3 (ADC3)
PA4 (ADC4)
PA5 (ADC5)
PA6 (ADC6)
PA7 (ADC7)
AREF
GND
AVCC
PC7 (TOSC2)
PC6 (TOSC1)
PC5
PC4
PC3
PC2
PC1 (SDA)
PC0 (SCL)
PD7 (OC2)
PLCC
7
39
8
38
9
37
RESET
10
36
VCC
11
35
GND
12
34
XTAL2
13
33
XTAL1
14
32
15
31
16
30
17
29
2502K–AVR–10/06
PA4 (ADC4)
PA5 (ADC5)
PA6 (ADC6)
PA7 (ADC7)
AREF
GND
AVCC
PC7 (TOSC2)
PC6 (TOSC1)
PC5
PC4
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