Block Diagram - Atmel AVR ATmega324PA Specification Sheet

2. Overview
2.1

Block Diagram

Figure 2-1. Block Diagram
VCC
Power
Supervision
RESET
POR / BOD &
RESET
Watchdog
GND
Timer
Watchdog
Oscillator
XTAL1
Oscillator
Circuits /
Clock
Generation
XTAL2
TOSC2/PC7
8152GS–AVR–11/09
The ATmega164PA/324PA/644PA/1284P is a low-power CMOS 8-bit microcontroller based on
the AVR enhanced RISC architecture. By executing powerful instructions in a single clock cycle,
the ATmega164PA/324PA/644PA/1284P achieves throughputs approaching 1 MIPS per MHz
allowing the system designer to optimize power consumption versus processing speed.
PA7..0
PORT A (8)
A/D
Converter
EEPROM
JTAG/OCD
TWI
PORT C (8)
TOSC1/PC6 PC5..0
The AVR core combines a rich instruction set with 32 general purpose working registers. All the
32 registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two independent
registers to be accessed in one single instruction executed in one clock cycle. The resulting
architecture is more code efficient while achieving throughputs up to ten times faster than con-
ventional CISC microcontrollers.
ATmega164PA/324PA/644PA/1284P
Internal
Bandgap reference
CPU
FLASH SRAM
PB7..0
PORT B (8)
Analog
Comparator
SPI
8bit T/C 0
16bit T/C 1
8bit T/C 2
PORT D (8)
PD7..0
USART 0
USART 1
5