Atmel ATmega8535L User Manual page 168

ATmega8535(L)
168
• Bit 5:4 – UPM1:0: Parity Mode
These bits enable and set type of parity generation and check. If enabled, the Transmit-
ter will automatically generate and send the parity of the transmitted data bits within
each frame. The Receiver will generate a parity value for the incoming data and com-
pare it to the UPM0 setting. If a mismatch is detected, the PE Flag in UCSRA will be set.
Table 65. UPM Bits Settings
UPM1
0
0
1
1
• Bit 3 – USBS: Stop Bit Select
This bit selects the number of stop bits to be inserted by the Transmitter. The Receiver
ignores this setting.
Table 66. USBS Bit Settings
USBS
0
1
• Bit 2:1 – UCSZ1:0: Character Size
The UCSZ1:0 bits combined with the UCSZ2 bit in UCSRB sets the number of data bits
(character size) in a frame the Receiver and Transmitter use.
Table 67. UCSZ Bits Settings
UCSZ2 UCSZ1
0
0
0
0
1
1
1
1
• Bit 0 – UCPOL: Clock Polarity
UPM0 Parity Mode
0 Disabled
1 Reserved
0 Enabled, Even Parity
1 Enabled, Odd Parity
UCSZ0
0 0
0 1
1 0
1 1
0 0
0 1
1 0
1 1
Stop Bit(s)
1-bit
2-bit
Character Size
5-bit
6-bit
7-bit
8-bit
Reserved
Reserved
Reserved
9-bit
2502K–AVR–10/06