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BUS FREE DELAY (800 nanoseconds).
The minimum time that an SCSI
device must wait from its detection of the BUS FREE phase (-BSY and
-SEL both deasserted for a bus settle delay) until its assertion of
-BSY when going to ARBITRATION phase.
BUS SET DELAY (1.8 microseconds).
The maximum time for an SCSI device
to assert -BSY and its SCSI ID bit on the DATA BUS after it detects
BUS FREE phase (-BSY and -SEL both deasserted for a bus settle delay)
for the purpose of entering ARBITRATION phase.
BUS SETTLE DELAY (400 nanoseconds).
The time to wait for the bus to
settle after changing certain control signals as called out in the
protocol definitions.
CABLE SKEW DELAY (10 nanoseconds).
The maximum difference in pro-
pagation time allowed between any two SCSI bus signals when measured
between any two SCSI devices.
DATA RELEASE DELAY (400 nanoseconds).
The maximum time for an ini-
tiator to release the DATA BUS signals following the transition of the
I/O signal from deasserted to asserted.
DESKEW DELAY (45 nanoseconds).
The minimum time required for deskew
of certain signals.
RESET HOLD TIME (25 microseconds).
The minimum time for which -RST is
asserted.
There is no maximum time.
SELECTION ABORT TIME (200 microseconds).
The maximum time that a
target (or initiator) takes from its most recent detection of being
selected (or reselected) until asserting a -BSY response.
This time-
out is required to ensure that a target (or initiator) does not assert
-BSY after a SELECTION (or RESELECTION) phase has been aborted.
This
is not the selection timeout period.
SELECTION TIMEOUT DELAY (250 milliseconds).
The minimum time that an
initiator (or target) waits for a -BSY response during the SELECTION
(or RELSELECTION) phase before starting the timeout procedure.
Figure 2-7 is an SCSI bus timing diagram showing all of the SCSI bus
signals and many of the above delays.
2.2.6
Power Requirements
Voltage and current requirements for the dc power supplied to the
drive are listed in Table 2-2.
There is no regulation on the drive;
regulated power must be supplied.
Supply returns are connected toget-
her, to the PCB ground plane, the headstack, and the base casting.
An
external ground may be connected to a tab on the base casting (see
section 4.3).
2-14
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