Table of Contents
Advertisement
2.2.8
Flex Circuit
The Flex Circuit is a flexible printed circuit mounted in the sealed
HDA, close to the heads to improve the signal-to-noise ratio.
One end
of the" thin flexible circuit is clamped under the cover and terminates
in a 16-pin connector which mates with J4 on the PCB.
A special pur-
pose preamplifier/write driver IC (SSI 501) is soldered to the circuit
inside the drive.
This chip:
o
Selects the head according to three-bit logic input
+BUF HS2, +BUF HS1, +BUF HSO, from the microprocessor,
through DICEY.
o
switches from reading to
w~iting
when DICEY asserts -BUF WR
GATE.
o
When writing, mUltiplies WRITE CURRENT.
On successive
falling edges of +BUF WR DATA, the chip sources the
multiplied current through alternate sides of the coil,
reversing the magnetic field and magnetizing the spinning
media in alternate directions.
o
Amplifies read signals from each head about 100 times.
o
Detects fault conditions such as defective heads, write
current while reading, no write current, and write data
transitions too infrequent.
If faults are detected, asserts
+WR UNSAFE.
The output is the differential signal RDX and RDY.
2.3
PCB Functional Elements
2.3.1
Power-an-Reset (PaR) and Warm Reset
A cold reset is triggered by:
o
Low supply voltage
o
SCSI bus signal -RST asserted by the host, with the RO
shorting plug installed in the drive.
paR resets the microprocessor, DICEY, the 5080 SCSI controller, and
the actuator driver, and enables the electronic return spring (after a
delay).
paR dynamically brakes the motor by clamping all coil output
voltages to 6 V.
Transistor switches perform each function.
paR is released 11 ms to 60 ms after +5 V and +12 V are normal, a
delay that ensures that the power is stable and also allows the logic
to initialize during power up.
To avoid multiple resets, the paR
thresholds are set below the normal power operating ranges and a
2-19
Advertisement
Table of Contents
