Quantum Q250 Technical Reference Manual page 16

Q200 series intelligent disk drives
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Architecture
A standard 8-bit microprocessor operated at 12 MHz controls each Q200
Series drive.
An 8031 is used for drives without DisCache, an 8032
for drives with it.
Firmware is in a plug-in 32 K X 8 EPROM.
Dif-
ferent EPROMS are used for the Q250 and Q280, and for drives with and
without DisCache.
Special EPROMs may be used for custom applications.
communication between the major circuit components is over the 8-bit
MAD (multiplexed address/data) bus.
DICEY, a proprietary data-
controller IC, manages access to the buffer, which is 16 KBytes of
dynamic RAM (64 KBytes for drives with DisCache).
The upper 2 KBytes
of RAM (4 KBytes with DisCache) is reserved for Q250/Q280 use.
DICEY
is the DMA controller, performs serial to parallel and parallel to
serial conversions, handles all RLL encoding and decoding, and
generates the ECC syndrome.
SCSI Bus Operations
Communications with the host and other SCSI devices is over the SCSI
bus.
The interface is implemented with a 5080 SCSI Controller IC that
can play the role of initiator or target, and performs disconnect/
reconnect and arbitration functions.
Before the disk is written to, a full sector of incoming SCSI data is
accumulated in buffer RAM (via DMA transfers).
As the disk is being
read from, data is also stored in RAM.
After a full sector is read,
the data is checked with the error-correcting code (at the user's
option), transferred through the 5080 via DMA, then on to the SCSI
bus.
Users can select the action to be taken in the event that an
error is detected, via the MODE SELECT command.
Servo
While track-following, track and sector numbers of the current posi-
tion are stored in buffer RAM--the microprocessor knows the exact head
position at all times.
When a READ or WRITE command arrives, the
microprocessor immediately starts a seek by commanding the head posi-
tion DAC (digital-to-analog converter) via the MAD bus.
The DAC
output is converted to a high current, which drives the actuator.
New track and sector numbers are read on the fly from the servo
bursts, forming a closed loop.
The microprocessor accelerates, then
decelerates, the actuator via the head position DAC to achieve the
seek in the shortest time.
As servo bursts pass under the head, their amplitudes are measured by
the AMC (amplitude measurement circuit), and placed on the MAD bus by
the servo ADC (analog-to-digital converter).
When seeking, the micro-
processor reads head position from the burst with the highest ampli-
tude, if possible.
Once the head is on track, the microprocessor
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