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I
I
I
I
I
I
\
REGISTERS/
V
\
CONTROL LOGIC
t\
DMA
SCSI
~
-y
NTERFACE
NTERFACE
1
r
I
~~
~J
I
I
I
I
I
L ____
MICROPROCESSOR
- - - -
INPUT PORT
____ J
INTERFACE
Figure 2-10: 5080 Conceptual Block Diagram
DMA
TO
HOST
REGISTER
STROBE
HOST
TO
DMA
REGISTER
STROBE
~
1.S
I
~----~~-YI ~*=-r-
BUFFERED
llATA BUS
DMA CmHROL
TO/FROM DICE {
ON TROLLER
TTL
INPUT
MADO-7
ADORESS/
DATA BUS
1.0
(REG
5)
STROBE
HOST DATA
(REG
6,7)
STROBE
SELECT
SELECT
READ REGISTER
MUL TIPLEXER
REG.O
REG. 1 REG. 2
WRITE HOST
MULT IPLEXER
INTERRUPT
roRD, IOWR, ALE
...-_--==:::;---
OPTIONS
(SHORTING PLUGS)
HOST
INTERFACE
SCSI
BUS
Figure 2-11: 5080 Interface Diagram
2-22
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