Canon A-200 series Service Manual page 65

CPU cycle DMA cycle
Write buffer
*
Writes to even addresses.
*
Reads even addresses of main
(DO - 07)
*
Inhibited when accessing a memory.
U60 16-bit board.
Read latch
*
I/O read, INTA cycle
*
Writes to main memory and/or
(DO - 07) *
Inhibited when accessing
16-bit board memory.
U66
main memory and/or 16-bit
board memory
Write buffer
* Writes to odd addresses.
*
Reads odd addresses of main
(08 - 015) * Inhibited when accessing 16-bit memory and/or 16-bit board
U73 board. memory.
Read latch
*
I/O read
*
Writes to main memory and/or
(08 - 015)
* Inhibited when accessing
16-bit board memory.
U6?
main memory and/or 16-bit
board memory.
Data buffer
*
Accesses even addresses of *
Inhibited
(DO - 07) 16-bit board.
U68
Data buffer
*
Accesses odd addresses of *
Reads/writes main memory
(08 - 015) 16-bit board.
and/or 16-bit board memory.
U65
Table 6·3
Signal
Description
MRD Memory read command
MWR Memory write command
lOR I/O read command
lOW I/O write command
DEN Data enable signal for data transceivers
T/R Direction signal for Data transceivers when ''H': the transceiver be­
comes write mode, when "1.:', becomes read mode.
ALE Strobe signal for address latches .. The down edge of this signal latches
address signals from the CPU.
Table 6·4
62