Dram Clock; Dram Timing - Acorp 7KT400 User Manual

Chapter 2
DRAM Clock/Drive Control
Press Enter on this item to open the Sub-menu as shown below:
Phoenix - AwardBIOS CMOS Setup Utility
Current FSB Frequency
Current DRAM Frequency

DRAM Clock

DRAM Timing

x DRAM CAS Latency
x Bank Interleave
x Precharge to Active(Trp)
x Active to Precharge(Tras)
x Active to CMD(Trcd)
DRAM Burst Length
DRAM Queue Depth
DRAM Command Rate
Write Recovery Time
DRAM twTR
DRAM Access
←→↑↓: Move Enter:Select +/-/PU/PD:Value F10:Save ESC:Exit F1:General Help
F5:Previous Values F6:Fail-Safe Defaults
Current FSB Frequency
This item shows the current FSB Frequency
Current DRAM Frequency
This item shows the current DRAM Frequency
DRAM Clock
This item is to set the DRAM clock..
The Choices: By SPD; 100 MHz; 133 MHz; 166 MHz; 200 MHz
DRAM Timing
This item is to set the DRAM transaction timing.
The Choices: Auto by SPD; Turbo; Ultra; Manual
DRAM Clock/Drive Control
100MHz
100MHz
By SPD
Auto By SPD
2.5
Disabled
3T
6T
3T
4
4 Level
2T Command
3T
3T
2T
2-42
7KT400 BIOS Setup
Item Help
F7:Optimized Defaults