Clear Interrupt And Fifo - Base+8 And Base+9; D/A Output Channel 0 - Base+10 And Base+11 - Advantech PCI-1711 User Manual

C.9 Clear Interrupt and FIFO — BASE+8 and BASE+9
Writing data to either of these two bytes clears the interrupt or the
FIFO.
Write
Bit #
BASE+9
BASE+8
C.10 D/A Output Channel 0 — BASE+10 and BASE+11
The write-only registers of BASE+10 and BASE+11 accept data for
D/A Channel 0 output.
PCI-1731
The PCI-1731 is not equipped with the D/A functions.
PCI-1711
Write
Bit #
BASE+11
BASE+10
DA11 ~ DA0
Advantech Co., Ltd.
www.advantech.com
Table C-8 Register to clear interrupt and FIFO
7 6
Table C-9 Register for D/A channel 0 data
7 6
DA7 DA6 DA5
Digital to analog data
DA0 LSB of the D/A data
DA11 MSB of the D/A data
Clear Interrupt and FIFO
5 4 3
Clear FIFO
Clear Interrupt
D/A Output Channel 0
5 4 3
DA11
DA4 DA3
– 47 – PCI-1711/1731 User's Manual
APPENDIX C
2 1 0
2 1 0
DA10 DA9 DA8
DA2 DA1 DA0