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Base + 7
Write
Bit No.
7
Name
DACH1
Reset
0
DACH1–0 D/A channel. The values written to Base + 6 and Base + 7 update the selected channel
immediately unless DASIM is enabled. The update takes approximately 50ns due to the DAC
serial interface.
DA11–8
D/A bits 11 - 8; DA11 is the MSB. D/A data is an unsigned 12-bit value. Writing to this register
updates the DAC (If DASIM is disabled).
Base + 7
Read
Bit No.
7
Name
-
Reset
0
TINT
Timer interrupt status, 1 = interrupt pending, 0 = interrupt not pending.
DINT
Digital I/O interrupt status, 1 = interrupt pending, 0 = interrupt not pending.
AINT
Analog input interrupt status, 1 = interrupt pending, 0 = interrupt not pending.
ADCH3-0
Current A/D channel. This is the channel that will be sampled on the next conversion.
When any of the bits 6–4 are 1, the corresponding circuit is requesting interrupt service. The interrupt routine
must poll these bits to determine which circuit needs service and then act accordingly.
Base + 8
Read / Write
Bit No.
7
Name
A7
Reset
0
These registers are used for digital I/O on PortA. The direction of each register is controlled by the DIO control
register at Base+11.
Base + 9
Read / Write
Bit No.
7
Name
B7
Reset
0
These registers are used for digital I/O on PortB. The direction of each register is controlled by the DIO control
register at Base+11.
Athena IIII User Manual Rev A.00
DAC MSB
6
5
DACH0
-
0
0
Analog Operation Status
6
5
TINT
DINT
AINT
0
0
Digital I/O Port A
6
5
A6
A5
0
0
Digital I/O Port B
6
5
B6
B5
0
0
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4
3
2
-
DA11
DA10
0
0
0
4
3
2
ADCH3
ADCH2
0
0
0
4
3
2
A4
A3
A2
0
0
0
4
3
2
B4
B3
B2
0
0
0
1
0
DA9
DA8
0
0
1
0
ADCH1
ADCH0
0
0
1
0
A1
A0
0
0
1
0
B1
B0
0
0
Page
52
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