DFI G5M300-P User Manual page 74

Rev. a+ system board
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3
BIOS Setup
3.1.3.8 Video BIOS Cacheable
As with caching the system BIOS, enabling the Video BIOS cache will
allow access to video BIOS addresssed at C0000H to C7FFFH to
be cached, if the cache controller is also enabled. The larger the range
of the Cache RAM, the faster the video performance.
3.1.3.9 Memory Hole At 15M-16M
In order to improve system performance, certain space in memory can
be reserved for ISA cards. This memory must be mapped into the
memory space below 16MB. When enabled, the CPU assumes the 15-
16MB memory range is allocated to the hidden ISA address range
instead of the actual system DRAM. When disabled, the CPU assumes
the 15-16MB address range actually contains DRAM memory. If more
than 16MB of system memory is installed, this field must be disabled
to provide contiguous system memory.
3.1.3.10 Delayed Transaction
When enabled, this function frees up the PCI bus for other PCI
masters during the PCI-to-ISA transactions. This allows PCI and ISA
buses to be used more efficiently and prevents degradation of
performance on the PCI bus when ISA accesses are made.
3.1.3.11 Delay Prior To Thermal
This field is used to select the time that would force the CPU to a
50% duty cycle when it exceeds its maximum operating temperature
therefore protecting the CPU and the system board from
overheating to ensure a safe computing environment..
3.1.3.12 AGP Aperture Size (MB)
This field is used to select the size of the system RAM that can be
allocated to the AGP for graphics purposes. Aperture refers to a
portion of the PCI memory address range that is dedicated for the
graphics memory address space. Host cycles that hit the aperture
range are forwarded to the AGP without any translation.
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