Thermal Simulation; Packaging Technology - Intel WiFi Link 5100 Design Manual

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Intel 5100 MCH Chipset
Table 2. Related Documents (Sheet 2 of 2)
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Intel I/O Controller Hub 9 (ICH9) Family Thermal and
Mechanical Design Guidelines
Quad-Core and Dual-Core Intel
Sequence with Intel
Communications, Embedded, and Storage Applications –
Platform Design Guide
Quad-Core Intel
Quad-Core Intel
Update
Quad-Core Intel
Mechanical Design Guidelines
Quad-Core Intel
Quad-Core Intel
Update
Quad-Core Intel
Mechanical Design Guidelines
Quad-Core Intel
Applications Thermal and Mechanical Design Guidelines
Various system thermal design suggestions
Notes:
1. Contact your Intel sales representative. Some documents may not be available at this time.
1.4

Thermal Simulation

Intel provides thermal simulation models of the Intel
associated user's guides to aid system designers in simulating, analyzing, and
optimizing their thermal solutions in an integrated, system-level environment. The
models are for use with the commercially available Computational Fluid Dynamics
(CFD)-based thermal analysis tools Flomerics* FLOTHERM* (version 5.1 or higher) and
Fluent* Icepak* (version 4.3.10 or higher). Contact your Intel field sales representative
to order the thermal models and user's guides.
2.0

Packaging Technology

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Intel 5100 MCH Chipset-based platforms consist of two individual components: the
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Intel 5100 MCH Chipset and the ICH9R. The Intel
mm, 10-layer flip chip ball grid array (FC-BGA) package (see
Figure 4). For information on the ICH9R package, refer to the Intel
9 (ICH9) Family Thermal and Mechanical Design Guidelines.
Intel
July 2008
Order Number: 318676-003US
Document
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Xeon Processor 5000
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5100 Memory Controller Hub Chipset for
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Xeon Processor 5300 Series Datasheet
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Xeon Processor 5300 Series Specification
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Xeon Processor 5300 Series Thermal/
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Xeon Processor 5400 Series Datasheet
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Xeon Processor 5400 Series Specification
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Xeon Processor 5400 Series Thermal/
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Xeon Processor L5318 in Embedded
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5100 Memory Controller Hub Chipset for Communications, Embedded, and Storage Applications
Document Number/URL
http://www.intel.com/ (316974)
Note 1
http://www.intel.com/ (315569)
http://www.intel.com/ (315338)
http://www.intel.com/ (315794)
http://www.intel.com/ (318589)
http://www.intel.com/ (318585)
http://www.intel.com/ (318611)
http://www.intel.com/ (318474)
http://www.formfactors.org
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5100 MCH Chipset and
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5100 MCH Chipset uses a 42.5
Figure 2, Figure
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I/O Controller Hub
3, and
TDG
9