Autoscan Phy Address Enable ($0X682); Mdio Control ($0X683); Datasheet - Intel IXF1104 Datasheet

Table 144. Autoscan PHY Address Enable ($0x682)
Bit Name
Register Description: Defines valid PHY addresses. Each bit enables the corresponding
PHY address.
0 = Disable the PHY address
1 = Enable the PHY address
NOTE: Autoscan is only applicable for the ports in copper mode.
31:4 Reserved
Autoscan PHY
3:0
Address
1. RO = Read Only, No clear on Read; R = Read, Clear on Read; W = Write only; R/W = Read/Write, No
clear; R/W/C = Read/Write, Clear on Write
Table 145. MDIO Control ($0x683)
Bit Name
Register Description: Miscellaneous control bits.
31:4 Reserved
3 MDIO in Progress
MDIO in Progress
2
Enable
1 Autoscan Enable
0 MDC Speed
1. RO = Read Only, No clear on Read; R = Read, Clear on Read; W = Write only; R/W = Read/Write, No
clear; R/W/C = Read/Write, Clear on Write

Datasheet

Document Number: 278757
Revision Number: 009
Revision Date: 27-Oct-2005
®
Intel IXF1104 4-Port Gigabit Ethernet Media Access Controller
Description
Reserved
Autoscan PHY address enable
0 = Disable address
1 = Enable address
Description
Reserved
MDIO progress. This bit reflects the status of
MDIO transaction
0 = MDIO Single command not in progress
1 = MDIO Single Command in progress
Enables the MDIO in progress bit
0 = Disable MDIO in progress register bit
1 = Enable MDIO in progress register bit
Autoscan enable
0 = Disable Autoscan
1 = Enable Autoscan
MDC speed
0 = MDC runs at 2.5 MHz
1 = MDC runs at 18 MHz
1
Type Default
0x00000000
RO 0x0000000
R/W 1111
1
Type Default
0x00000000
RO 0x000
RO 0
R/W 0
R/W 0
R/W 0
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