Lcd Panel Interface; Clock - Epson S5U13700B00C User Manual

Page 20

4.2 LCD Panel Interface

4.3 Clock

S1D13700
X42A-G-002-01
All the LCD interface signals are available on connector H1. Connector H1 is a 8x2 header,
0.1x0.1" pitch. The following diagram shows the location of the LCD connector (H1).
Top View
Figure 4-2: LCD Connector (H1) Location
For the pinout of connector H1, refer to the schematics (see Section 6, "Schematic
Diagrams" on page 23).
The S1D13700 accepts a clock signal from an oscillator or from a crystal. If the oscillator
is used, the crystal input (XCG1) must be connected to ground and the crystal output
(XCD1) must not be connected. If the crystal is used, the clock input (CLKI) must be
connected to ground. For details on connecting CLKI or XCG1 to ground, refer to the JP5
description (see "JP6 - Crystal Enable" on page 15).
The default configuration of the S5U13700B00C uses a 32MHz crystal. Jumper JP5 is in
position 1-2 to connect the CLKI input to ground because it is not used. Jumper JP6 is in
position 1-2 to connect the XCD1 output to the crystal.
The board can use the CLKI input instead of the crystal. To use the CLKI input, JP5 must
be moved to position 2-3 to connect the XCG1 input to ground. Also, jumper JP6 must be
moved to position 2-3 to disconnect the XCD1 output from the crystal.
The CLKI signal can be provided on the host interface connector or by an on-board oscil-
lator. Jumper JP4 is used to select the clock source. In position 1-2, the clock is provided
by populating an oscillator into the 14-pin DIP socket U2. In position 2-3, the clock must
be provided on pin 4 of the host interface connector P1.
H1
S5U13700B00C Rev. 1.0 Evaluation Board User Manual
Revision 1.0
Epson Research and Development
Vancouver Design Center
LCD Connector
Issue Date: 2005/07/15