Agtl+ Signal Group Dc Specifications; Pwrgood Input And Tap Signal Group Dc Specifications - Intel Xeon Datasheet
Processor with 800 mhz system bus
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Also See for Xeon:
- Design manual (305 pages) ,
- Manuallines (11 pages) ,
- Specification (56 pages)
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Table 13.
AGTL+ Signal Group DC Specifications
Symbol
V
IL
V
IH
V
OH
I
OL
I
LI
I
LO
R
ON
NOTES:
1. Unless otherwise noted, all specifications in this table apply to all processor frequencies.
2. The V
TT
3. V
is defined as the voltage range at a receiving agent that will be interpreted as a logical low value.
IL
4. V
is defined as the voltage range at a receiving agent that will be interpreted as a logical high value.
IH
5. V
and V
IH
6. Refer to
7. Leakage to V
8. Leakage to V
Table 14.
PWRGOOD Input and TAP Signal Group DC Specifications
Symbol
V
HYS
V
t+
V
t-
V
OH
I
OL
I
LI
I
LO
R
ON
NOTES:
1. Unless otherwise noted, all specifications in this table apply to all processor frequencies.
2. All outputs are open drain.
3. V
represents the amount of hysteresis, nominally centered about 0.5 * V
HYS
inputs.
4. The V
TT
5. The maximum output current is based on maximum current handling capability of the buffer and is not
specified into the test load.
Datasheet
Parameter
Input Low Voltage
Input High Voltage
Output High Voltage
Output Low Current
Input Leakage Current
Output Leakage Current
Buffer On Resistance
represented in these specifications refers to instantaneous V
may experience excursions above V
OH
Table 6
to determine which signals include additional on-die termination resistance (R
with pin held at V
.
SS
TT
with pin held at 300 mV.
TT
Parameter
Input Hysteresis
Input Low to High
Threshold Voltage
Input High to Low
Threshold Voltage
Output High Voltage
Output Low Current
Input Leakage Current
Output Leakage Current
Buffer On Resistance
represented in these specifications refers to instantaneous V
Intel® Xeon™ Processor with 800 MHz System Bus
Min
0.0
GTLREF - (0.10 * V
GTLREF +
(0.10 * V
)
TT
0.90 * V
TT
N/A
N/A
N/A
7
.
TT
Min
200
0.5 * (V
+ V
)
0.5 * (V
TT
HYS_MIN
0.5 * (V
- V
)
0.5 * (V
TT
HYS_MAX
N/A
N/A
N/A
7
Max
Unit
)
V
TT
V
V
TT
V
V
TT
V
/
mA
TT
(0.50 * R
+
TT_MIN
[R
|| R
])
ON_MIN
L
± 200
µA
± 200
µA
11
W
.
TT
).
L
Max
Unit
350
mV
+ V
)
V
TT
HYS_MAX
- V
)
V
TT
HYS_MIN
V
V
TT
45
mA
± 200
µA
± 200
µA
11
W
for all PWRGOOD and TAP
TT
.
TT
1
Notes
2,3
2,4,5
2,5
2,6
7,8
7,8
Notes
1,2
3
4
4
4
5
29
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