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Development Board Features
Table 6. Fern Hill Feature Set Summary
Component
Intel® Core™ 2 Duo processor SL9400
or
Intel® Core™ 2 Duo processor SU9400
Processor
Intel® GS45 Express Graphics and
Memory Controller Hub (GS45 GMCH)
Chipset
ICH9M-Enhanced SFF
512 MB DDR3 memory down
Memory
One DDR3 SO-DIMM slot
One PCI Express* Graphics Slot
One dual channel LVDS Connector
One VGA Connector
One TV D-Connector supporting S-Video,
Composite video and Component video
Video
Spread spectrum clocking
PCI revision 2.3 compliant
(33 MHz)
PCI
Three 5-V PCI slots are supported
through PCI Extension card
Six x1 PCIe lanes
PCI Express
Five x1 connectors
One x16 connector
The Intel® 82567 Gigabit Ethernet LAN
On-Board LAN
Development Kit User's Manual
Fern Hill Board Implementation
Comments
SL9400 has 1066 MT/s FSB; 1.86 GHz core;
6 MB L2 cache; 17 W TDP; 2 Cores; 956-ball
µFCBGA package.
SU9400 has 800 MT/s FSB; 1.40 GHz core; 3
MB L2 cache; 10 W TDP; 2 Cores; 956-ball
µFCBGA package.
1363-pin Micro-FCBGA package
569-pin BGA package
1 channel used for memory down and the
second used for SO-DIMM slot
Channel A: Memory down with 512-MB DDR3
1067 MT/s (x16 devices, four device on top
and four device on bottom)
Channel B: DDR3 800/1067 MT/s SO-DIMM
slot
Maximum 4.5 GB using 2-Gb technology and
stacked SO-DIMMs.
Maximum 2.5 GB using 2-Gb technology and
non-stacked SO-DIMMs.
No ECC support
Intel GS45 Express Chipset supports quad
monitors, but only has two video pipes which
support two different screens.
Support for SPWG3.5. 24 bit color panel
support (based on planned SPWG 4.0)
Support for two SDVO channels via x16 PCIe*
connector (through add-in cards)
Support for DisplayPort and native HDMI*
(via a x16 PCIe* connector, usage through
Eaglemont and native HDMI through add-in
card)
No PCI slots on motherboard
Only one PCI gold finger on board
Revision 1.0a compliant
Two sets of 2 in-line x1 PCIe slots
Intel® 82567 GbE controller LAN on
motherboard (muxed with one PCIe lane)
x2 PCIe lanes to docking via resistor stuffing
option
The Intel 82567 is connected to ICH9M SFF
via LCI interface and GLCI interface
27
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