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Development Board Features
Support for x2 on lane 1 and lane 2 (Port 1 can be configured as a x1 port or a x2 port
shared with port 2) and on Lane 3 and lane 4 (port 3 can be configured as a x1 port or
a x2 port shared with port 4) can be configured via the ICH9M-E SFF "RPC – Root Port
Configuration" register.
Table 8. PCI Express Ports
ICH9M
PCIe Port
1
2
3
4
5
6 (GLCI)
Slot 4 also supports controller link. Upon a net detect event, Slot 4 gets a switched
Auxiliary 3.3 V supply.
3.6.11
PCI Slots
The reference board does not have any PCI slots on the motherboard. Three 5V PCI
slots are supported via the Thimble Peak 2 PCI Extension Card.
3.6.11.1
PCI Gold-Fingers
A gold-finger connector (S9B1) is also supplied on the development board, which
allows an external PCI expansion board, Thimble Peak 2, to connect to it. Thimble
Peak 2 has three additional PCI slots allowing the user greater expansion. See
Appendix A
3.6.12
On-Board LAN
The development board provides 10/100/1000 LAN through EU8A1. Intel ® 82567 is
used on the reference board. The 82567 component is connected to the ICH9M-E SFF
I/O Controller Hub through the LAN Connect Interface (LCI) and supports 10/100Mbps
link. The same device is connected through GLCI interface and supports 1000Mbps
link. The Intel 82567 connects to an RJ45 connector at J5A1 with built in magnetic
decoupling.
Development Kit User's Manual
Default Destination
PCIe Slot 1 (J6B1)
PCIe Slot 2 (J6D1) (in-line with Slot
1)
PCIe Slot 3 (J8B3)
PCIe Slot 4 (J8D1) (in-line with Slot
3)
PCIe Slot 5 (J7B1)
Intel 82567 LAN
for more information on the Thimble Peak 2 add-in card.
Optional Destination
st
PCIe Docking (1
lane)
nd
PCIe Docking (2
lane)
C-link south routed to this slot. WLAN card
support through Upham3 Add-in card
Muxed with PCIe slot5 (only for testing)
35
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