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SM320F2812-HT
SGUS062B – JUNE 2009 – REVISED JUNE 2011
(1)
t
Pulse duration, INT input low/high
w(INT)
t
Pulse duration, PDPINTx input low
w(PDP)
(1)
t
Pulse duration, CxTRIP input low
w(CxTRIP)
(1)
t
Pulse duration, TxCTRIP input low
w(TxCTRIP)
(1) Not production tested.
(2) Input Qualification Time (IQT) = [5 × QUALPRD × 2] × t
XCLKOUT
(see Note A)
TxCTRIP, CxTRIP,
PDPINTx
(see Note B)
PWM
(see Note C)
XNMI, XINT1, XINT2
A0−A15
A.
XCLKOUT = SYSCLKOUT
B.
TxCTRIP – T1CTRIP, T2CTRIP, T3CTRIP, T4CTRIP . CxTRIP – C1TRIP, C2TRIP, C3TRIP, C4TRIP, C5TRIP, or
C6TRIP. PDPINTx – PDPINTA or PDPINTB
C.
PWM refers to all the PWM pins in the device (i.e., PWMn and TnPWM pins or PWM pin pair relevant to each
CxTRIP pin). The state of the PWM pins after PDPINTx is taken high depends on the state of the FCOMPOE bit.
6.17 General-Purpose Input/Output (GPIO) – Output Timing
Table 6-19. General-Purpose Output Switching Characteristics
t
Delay time, XCLKOUT high to GPIO low/high
d(XCOH-GPO)
(1)
t
Rise time, GPIO switching low to high
r(GPO)
(1)
t
Fall time, GPIO switching high to low
f(GPO)
(1)
f
Toggling frequency, GPO pins
GPO
(1) Not production tested.
106
Electrical Specifications
Table 6-18. Interrupt Timing Requirements
with no qualifier
with qualifier
with no qualifier
with qualifier
with no qualifier
with qualifier
with no qualifier
with qualifier
c(SCO)
t
, t
, t
w(PDP)
w(CxTRIP)
w(TxCTRIP)
Figure 6-20. External Interrupt Timing
PARAMETER
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1 × t
c(SCO)
1 × t
c(SCO)
1 × t
c(SCO)
1 × t
c(SCO)
t
d(PDP-PWM)HZ
t
All GPIOs
All GPIOs
All GPIOs
Copyright © 2009–2011, Texas Instruments Incorporated
SM320F2812-HT
www.ti.com
MIN
MAX
UNIT
2 × t
c(SCO)
cycles
(2)
+ IQT
2 × t
c(SCO)
cycles
(2)
+ IQT
2 × t
c(SCO)
cycles
(2)
+ IQT
2 × t
c(SCO)
cycles
(2)
+ IQT
, t
d(TRIP-PWM)HZ
w(INT)
t
d(INT)
Interrupt Vector
MIN
MAX
UNIT
1 × t
cycle
c(SCO)
10
ns
10
ns
20
MHz
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