Location Counter - Epson S1C62 Family Reference Manual

Cmos 4-bit single chip microcomputer development tool
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CROSS ASSEMBLER ASM62XX
Relational operators
A logical operator compares two terms; if the relationship between the terms is as the operator
specifies, 1FFFH (true) is returned; if not, 0 (false) is returned.
True when a is equal to b
a_EQ_b
a_NE_b
True when a is not equal to b
a_LT_b
True when a is less than b
True when a is less than or equal to b
a_LE_b
a_GT_b
True when a is greater than b
a_GE_b
True when a is greater than or equal to b
Be sure to insert one or more blanks for symbol "_" between terms. All operators must be entered in
uppercase letters.
An expression can contain one or more operators and pairs of parenthesis. In this case, operators are
basically evaluated from left to right. However, an operation stipulated by an operator with higher priority
or by parentheses is executed earlier. Every left parenthesis must have a corresponding right parenthesis.
The following table shows the priority of operators.
Operator
)
OR, XOR
AND
EQ, NE, LT, LE, GT, GE
+ (addition), - (subtraction)
*, /, MOD, SHL, SHR
(
HIGH, LOW, NOT
- (monadic negative), + (monadic positive)

Location counter

4.4.4
The start address of each instruction code is set in the location counter when a statement is assembled. A
label or $ can be used when referencing the location counter value in a program.
Location counter
The location counter consists of 13 bits: one bit for the bank field, four bits for the page counter field,
and eight bits for the step counter field.
Bank
Bit
12
11
Contents Bank
BNK
Example:
(BNK) (PCP) (PCS)
The location counter indicates the start address of the JP instruction, and the PCS value (02) is assigned to $.
Consequently, the statement is assembled as "JP 5", and the program sequence jumps to the location three
steps before (PCS=05) when it is executed.
III-10
Priority
Low
:
:
High
Page counter
10
9
8
Page address
PCP
Location counter
0
1
02
Examples: Operational expressions (ABC = 1, BCD = 3)
LD
A,BCD*(ABC+1)
LD
A,ABC LT BCD
OR
B,ABC SHL BCD
AND B,ABC SHL BCD XOR 0FH
Step counter
7
6
5
Step address
JP
$+3
EPSON
DEVELOPMENT TOOL REFERENCE MANUAL
;A-register <- 6
;A-register <- 0FH (1111B)
;Set bit 3 in B-register
;(=OR B,1000B)
;Reset bit 3 in B-register
;(=AND B,0111B)
4
3
2
1
PCS
S1C62 FAMILY
0

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