History Data Display - Epson S1C62 Family Reference Manual

Cmos 4-bit single chip microcomputer development tool
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Format
#H,<pointer 1>,<pointer 2>
#H,<pointer 1>
Function
Displays history data.
(1) Displays history data from <pointer 1> to <pointer 2>.
(2) When <pointer 2> defaults, displays history data of <pointer 1> in 21 lines.
(3) Numerals displayed in <pointer 1> and <pointer 2> are decimal, from 0 to 9999.
(4) The following contents are displayed for each instruction:
LOC:
PC:
IR:
OP:
OPR:
A,B,X,Y: Contents of A, B (Xp, Xh, Xl), (Yp, Yh, Yl) registers
IDZC:
Other:
(5) History memory has a capacity of 8192 bus cycles. One the other hand, the S1C62 Family
has 5, 7 and 12 clock instructions. The 5 clock instructions require three bus cycles, 7 clock
instructions require four bus cycles, and 12 clock instructions require six bus cycles. Thus,
the final value of the history pointer is changed according to the executed instruction. The
maximum final value of the execution time for only a 5 clock instruction is approximately
2700, while the execution time for a 12 clock instruction is about 1300. When a break
occurs before the history memory reaches the end, the last value of the history pointer is
reduced.
(6) The history memory receives new data until a break occurs. Old data is erased when
number of executed GO commands exceeds 2700.
(7) The top of the history pointer is 0. When the last value of <pointer 2> is set, the values are
displayed to the last value.
(8) When there are no history data (Before GO command, after GO command execution,
during T command execution, or during HAR command execution), the following
message is displayed:
* NO HISTORY DATA *
(9) The HB command can be used to view history data immediately prior to a break.
S1C62 FAMILY
DEVELOPMENT TOOL REFERENCE MANUAL

HISTORY DATA DISPLAY

History pointer (decimal)
Program counter (hexadecimal)
Command code (hexadecimal)
Command mnemonic
Command operand
Binary display of flag bit (1 when set, 0 when clear)
During execution of an instruction, the memory R/W cycle and data are
displayed. Also, data interrupts INT1 (stack data) and INT2 are displayed
EPSON
ICE CONTROL SOFTWARE ICS62XX
When a break, "PC" is displayed.
H
VIII-27

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