Br Set Break Register Condition - Epson S1C62 Family Reference Manual

ICE CONTROL SOFTWARE ICS62XX
BR, BRR
Format
#BR
#BRR
Function A break condition is set in the evaluation board CPU registers A, B, FLAG, X (Xp, Xh, Xl,) or
Y (Yp, Yh, Yl).
(1) BR:
(2) BRR: Cancels a break condition set by BR command.
(3) A break set by the BR command is operative at one point. BA and BD settings can be
mixed.
(4) A BR condition can be canceled by executing the BM command.
#BR
Examples
A
B
FI
FD
FZ
FC
X ---:040
Y ---:^
X ---:041
Y ---:030
A break condition set as described above, where A=C, FI=1, FZ=0, X=41, and Y=30.
#BR
A
B
FI
FD
FZ
FC
X 041:042
Y 030:*
Two break conditions where A=C and X=42 are described above.
VIII-54
SET/RESET BREAK REGISTER CONDITION
A break condition is set in the target registers A, B, FLAG, X (Xp, Xh, Xl,) or Y
(Yp, Yh, Yl). The break condition in each register can be masked (a masked
register can generate a break in another register, whatever the specified value).
Break is induced when the values of each register correspond to the set values in
the internal CPU registers.
-:C ...
-:*
-:1
-:* ...
-:0
-:*
...
C: ...
*:
1:*
*:
0:*
*:
A hyphen (-) is displayed when a BR condition is not set
Break condition is sequentially set
Enter an asterisk (*) mark to indicate masking
This induces a break unrelated to the FD value
If a parameter is mis-set, entering the ^ key will return
the operation to the previous setting (one less than the
current setting)
Reads a previously set break condition
When no setting modification is made, hitting the
continues the operation to the next setting
EPSON
DEVELOPMENT TOOL REFERENCE MANUAL
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S1C62 FAMILY