System Fault Relays; Server Management Bus (Smbus) Interface; Table 4-6. Alarms Smbus I/O Mapping - Intel TIGPT1U - Carrier Grade Server Specification

Carrier grade server
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Extended Front Panel System Board
4.4.6

System Fault Relays

The front panel board contains four relays. These relays are for power, critical, major and minor
alarms. The relays are controlled via the SMBus. See Section 4.4.7 for programming
information.
4.4.7

Server Management Bus (SMBus) Interface

The Torrey Pines baseboard communicates to the XFPB via the auxiliary I
server management functions. The I
SMBus functionality. Two I/O expanders on the XFPB are used as slave devices to interface to
the SMBus.
The first device (U3H1) is used to support the control and monitoring of the front panel alarms.
All signals at U3H1 that interface to the alarms circuitry are active low. During power up, the
device will reset all I/Os to the default High state. However, during system soft resets, the
device requires a software command to reinitialize all I/Os to the default inactive state.
Access to U3H1 during a write cycle can be performed by writing to address 0 x 40. Access to
U3H1 during a read cycle can be performed by writing to address 0 x 41. Refer to Table 4-6 for
an I/O map of U3H1.
The second device (U2H1) is used to support the control and monitoring of the two SCSI hard
drives. Also, during a drive fault condition, U2H1 receives commands from the baseboard to
activate the proper drive fault LED to provide visual indications of a fault condition. All signals at
U2H1 that interface to the SCSI control circuitry are active low. During power up, the device will
reset all I/Os to the default High state. However, during system soft resets, the device requires
a software command to reinitialize all I/Os to the default inactive state.
Access to U2H1 during a write cycle can be performed by writing to address 0 x 44. Access to
U2H1 during a read cycle can be performed by writing to address 0 x 45. Refer to Table 4-7 for
an I/O map of U2H1.
Bit
I/O
Name
0
O
Power alarm
1
O
Critical alarm
2
O
Major alarm
3
O
Minor alarm
4
I
Major alarm
sense
5
I
Minor alarm
sense
34
2
C interface operates at less than 20 Khz rate to support

Table 4-6. Alarms SMBus I/O Mapping

Writing 0 turns on the power alarm relay and illuminates the POWER LED,
writing 1 turns both off. The relay and LED may also be turned on by a
FAN_FAIL_L signal.
Writing 0 turns on the critical alarm relay and illuminates the CRITICAL LED,
writing 1 turns both off.
Writing a 1 to 0 edge will turn on the flip-flip that enables major alarm relay.
Writing a 1 will turn off the major alarm relay or a MAJOR_RESET signal input.
MAJOR LED in on when output is 0, off when output is 1.
Writing a 1 to 0 edge will turn on the flip-flip that enables major alarm relay.
Writing a 1 will turn off the major alarm relay or a MINOR_RESET signal input.
MINOR LED in on when output is 0, off when output is 1.
Senses the state of the major alarm relay. 0 relay is on, 1 relay is off. This
allows software to detect if the MAJOR_RESET signal was activated. Always
write 1 during write operations.
Senses the state of the minor alarm relay. 0 relay is on, 1 relay is off. This
allows software to detect if the MINOR_RESET signal was activated. Always
write 1 during write operations.
®
Intel
Carrier Grade Server TIGPT1U TPS
2
C bus to support
Description
1
1
Revision 1.0

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