Video Interfaces (J8, J9, J7); Crt Interface (J8); Table 3-20. Crt Interface Pin/Signal Descriptions (J8) - Ampro ReadyBoard 700 Reference Manual

Single board computer
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Chapter 3

Video Interfaces (J8, J9, J7)

The VT8606 chip provides the graphics control and video signals to the traditional glass CRT monitors
and the LCD and LVDS flat panel displays. The chip features are listed below:
CRT features:
Supports a max resolution of 1600 x 1200 with video frame buffer set at 8MB
Supports a maximum allowable video frame buffer size of 32MB UMA (Unified Memory
Architecture)
AGP 4x graphics (always enabled)
Compliant with Rev 2.0 of AGP Interface
Flat Panel features:
Supports (3.3V, 5V, or 12V) output to both DSTN and TFT flat panels through a 36-bit interface
Supports TFT panel sizes from VGA (320x480) up to SXGA+ and UXGA+ (1400x1050).
Supports LCD VGA and SVGA panels with 9-, 12-, 18-bit interface (1 Pixel/Clock)
Supports UXGA and SXGA active matrix panels with 1x24-bit interface (2 Pixels/Clock)
Supports 1 or 2 channel LVDS outputs

CRT Interface (J8)

Table 3-20. CRT Interface Pin/Signal Descriptions (J8)

Pin #
Signal
1
RED
2
GREEN
3
BLUE
4
NC
5
GND
6
GND
7
GND
8
GND
9
NC
10
GND
11
NC
12
DDDA
13
HSYNC
14
VSYNC
15
DDCLK
Notes: The shaded area denotes power or ground.
46
Description
Red – This is the Red analog output signal to the CRT.
Green – This is the Green analog output signal to the CRT.
Blue – This is the Blue analog output signal to the CRT.
Not connected
Digital Ground
Digital Ground
Digital Ground
Digital Ground
Not connected
Digital Ground
Not connected
Display Data Channel Data – This signal line provides information to the CPU
through the Northbridge about the monitor type, brand, and model. This is part
of the Plug and Play standard developed by the VESA trade association.
Horizontal Sync – This signal is used for the digital horizontal sync output to
the CRT.
Vertical Sync – This signal is used for the digital vertical sync output to the CRT.
Display Data Channel Clock – This signal line provides the data clock signal to
the CPU through the Northbridge from the monitor. This is part of the Plug and
Play standard developed by the VESA trade association.
Reference Manual
Hardware
ReadyBoard 700

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