Ampro ReadyBoard 700 Reference Manual page 42

Chapter 3
Pin # Signal
25 CFD2
26 CFD1
27 SDD11
28 SDD12
29 SDD13
30 SDD14
31 SDD15
32 SDCS3*
33 NC
34 SDIOR*
35 SDIOW*
36 VCC
37 IRQ15
38 VCC
39 MASTER* Master/Slave – This signal is determined by jumper JP4 and is used to configure
40 NC
41 RSTIDE*
42 SDIORDY Secondary Device I/O-DMA Channel Ready – When negated, extends the host
43 NC
44 VCC
45 IDE LED2
46 SD33-66
47 SDD8
48 SDD9
49 SDD10
50 GND
Notes: The shaded area denotes power or ground. The signals marked with * = Negative true logic.
36
Description
Connected through 4.7k ohm resister to ground
Connected through 4.7k ohm resister to ground
Secondary Disk Data 11 – Refer to SDD3 on pin-2 for more information.
Secondary Disk Data 12 – Refer to SDD3 on pin-2 for more information.
Secondary Disk Data 13 – Refer to SDD3 on pin-2 for more information.
Secondary Disk Data 14 – Refer to SDD3 on pin-2 for more information.
Secondary Disk Data 15 – Refer to SDD3 on pin-2 for more information.
Secondary Slave/Master Chip Select – This signal, along with CE1*, is used to
select the CompactFlash card and indicate to the card when a byte or word
operation is being performed. This signal always accesses the odd byte of word.
Not Connected (VS1*)
Secondary Device I/O Read/Write Strobe – This signal is generated by the host
and gates the I/O data onto the bus from the CompactFlash card when the card is
configured to use the I/O interface.
Secondary Device I/O Read/Write Strobe – This signal is generated by the host
and clocks the I/O data on the Card Data bus into the CompactFlash card
controller registers when the card is configured to use the I/O interface. The clock
occurs on the negative to positive edge of the signal (trailing edge).
+5 volts +/-5%
Interrupt Request 15 – IRQ 15 is asserted by drive (CF) when it has a pending
interrupt (PIO transfer of data to or from the drive to the host).
+5 volts +/-5%
this device as a Master or a Slave. When this pin is grounded (jumper inserted),
this device is configured as Master. When this pin is open (jumper removed), this
device is configured as Slave (Default).
Not Connected (VS2*)
Secondary IDE Reset – This input signal is the active low hardware reset from the
host. If this pin goes high, it is used as the reset signal. This pin is driven high at
power-up, causing a reset, and if left high will cause another reset.
transfer cycle of any host register access when the drive is not ready to respond to
a data transfer request. High impedance if asserted.
Not Connected (InpAck)
+5 volts +/-5%
IDE Activity – Indicates CF activity to yellow IDE LED (D4) oncard edge.
SD33/66 Sense –Senses which DMA mode to use for the CompactFlash card.
Secondary Disk Data 8 – Refer to SDD3 on pin-2 for more information.
Secondary Disk Data 9 – Refer to SDD3 on pin-2 for more information.
Secondary Disk Data 10 – Refer to SDD3 on pin-2 for more information.
Digital Ground
Reference Manual
Hardware
ReadyBoard 700