Table of Contents
Advertisement
Chapter 3
30 (D9)
DRQ0
31 (D10)
DACK5*
32 (D11)
DRQ5
33 (D12)
DACK6*
34 (D13)
DRQ6
35 (D14)
DACK7*
36 (D15)
DRQ7
37 (D16)
+5V
38 (D17)
MASTER*
39 (D18)
GND
40 (D19)
GND
Notes: The shaded area denotes power or ground. The signals marked with * = Negative true logic.
32
DMA Request 0 – Used by I/O resources to request DMA service.
Must be held high until associated DACK0 line is active.
DMA Acknowledge 5 – Used by DMA controller to select the I/O
resource requesting the bus, or to request ownership of the bus as a bus
master device. Can also be used by the ISA bus master to gain control
of the bus from the DMA controller.
DMA Request 5 – Used by I/O resources to request DMA service.
Must be held high until associated DACK5 line is active.
DMA Acknowledge 6 – Used by DMA controller to select the I/O
resource requesting the bus, or to request ownership of the bus as a bus
master device. Can also be used by the ISA bus master to gain control
of the bus from the DMA controller.
DMA Request 6 – Used by I/O resources to request DMA service.
Must be held high until associated DACK6 line is active.
DMA Acknowledge 7 – Used by DMA controller to select the I/O
resource requesting the bus, or to request ownership of the bus as a bus
master device. Can also be used by the ISA bus master to gain control
of the bus from the DMA controller.
DMA Request 7 – Used by I/O resources to request DMA service.
Must be held high until associated DACK7 line is active.
+5 volt power ±10%
Bus Master Assert – This signal is used by an ISA board along with a
DRQ line to gain ownership of the ISA bus. Upon receiving a -DACK
a device can pull -MASTER low which will allow it to control the
system address, data, and control lines. After -MASTER is low, the
device should wait one CLK period before driving the address and data
lines, and two clock periods before issuing a read or write command.
Ground
Ground
Reference Manual
Hardware
ReadyBoard 700
Advertisement
Table of Contents
