Errata - Intel DUAL-CORE - SPECIFICATION UPDATE REV 010 Specification

Errata

Errata
AN1. FST Instruction with Numeric and Null Segment Exceptions May Take
Numeric Exception with Incorrect FPU Operand Pointer
Problem: If execution of an FST (Store Floating Point Value) instruction would generate both
numeric and Null segment exceptions, the numeric exceptions may be taken first and
with the Null x87 FPU Instruction Operand (Data) Pointer.
Implication: Due to this erratum, on an FST instruction the processor reports a numeric exception
instead of reporting an exception because of a Null segment. If the numeric exception
handler tries to access the FST data it will get a #GP fault. Intel has not observed this
erratum with any commercially available software, or system.
Workaround: The numeric exception handler should check the segment and if it is Null avoid further
access to the data that caused the fault.
Status: For the steppings affected, see the
AN2. Code Segment Limit Violation May Occur on 4-Gbyte Limit Check
Problem: Code Segment limit violation may occur on 4-Gbyte limit check when the code stream
wraps around in a way that one instruction ends at the last byte of the segment and
the next instruction begins at 0x0.
Implication: This is a rare condition that may result in a system hang. Intel has not observed this
erratum with any commercially available software, or system.
Workaround: Avoid code that wraps around segment limit.
Status:
For the steppings affected, see the
Specification Update
Summary Tables of Changes.
Summary Tables of Changes.
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