The
display
illuminates
centralized
information
of
frequency, mode, transmit and receive conditions, memory
channel, operating
mode
(VFO A, VFO
B, GENE,
DUP,
SCAN), etc. The operating conditions of the transceiver can
be easily understood
because of this centralized display.
The display lights up in two colors, red and white, using
color filters. LEDs for the transmit and receive indicators and
the narrow selection in CW and RTTY modes are also a part
of this unit.
(a)
DISPLAY SECTION
DS1, the luminescent display tube, is driven by drivers IC1
and IC2, and lights dynamically. These ICs contain such
functions
as
input
data
latch,
clock
oscillator,
timing
DISPLAY DATA TIMING CHART
counters, and segment decoders. The clock frequency is set
by C2 and C6.
Displays for the receive and transmit shift frequencies and
memory channels are driven by IC2. Other displays are
driven by IC1.
Signals for the display of RTTY through GENE are sent from
the LOGIC UNIT to each segment. These are switched by
digit signals TO~T6 from IC1 and T3 from IC2. The transmit,
receive, "—", and "DUP" INDICATORS are connected to the
same digit in the tube, so each indicator is selected by T4, T1,
and TO digit signals and light up dynamically.
200h
RESET
POWER
ON
RESET pulse is output only when the power is turned ON.
RESET
f-
—ff
]
2002
[]130u[]
190"
[7] 140¢[7]
170%
[| 150n []
190%
40u
i
*CTL
JS
f--—
(IC1)
4s
FSO / DBO
TO
T1
T2
T3
T4
T5
T6
17
5
5
FS3
cs]
DATA
DATA
DATA
DATA |
DATA
DATA
DATA
{{
at
(IC2)
{,——
Rso
/DB4
TO
TI
T2
T3
T4
T5
T6
17
DATA
DATA
DATA
DATA |
DATA |
DATA
DATA
rs3
\0B7/
ye
"CTL pulse intervals are measured with a 4MHz clock.
Fig. 22
(b)
DC-DC CONVERTER
SECTION
The +5V voltage source is produced from 13.8V, a voltage
regulator.
The DC-DC converter is composed of Q4, Q5, and T1, and
generates rectangular pulses of about 15kHz. The pulses are
applied
to T1
to obtain
—5V,
—35V,
3.5V
AC
from
the
corresponding coils.
Except for 3.5V AC which is provided for the filament of the
display tube, all the voltages are rectified for DC voltages. As
for —5V, the rectified DC-DC converter output is regulated
by 1C4 and is supplied to IC1, |C2, and the MAIN UNIT.
.
Q6~Q8 comprise a circuit which keeps the display OFF for
about 2 seconds before the initial reset is completed when
the power
is turned
ON.
Immediately
after the power
is
turned ON, Q6 through Q8 are OFF and—35V is not output.
When
data
(CTL)
is supplied
from
the LOGIC
UNIT
as
resetting is completed, Q8 is turned ON, and then Q6 and Q7
are turned ON for —35V
output for the display.
Q6, Q7, D19, and R41 forma latch circuit, ensuring that once
the circuit is turned ON it will keep providing—35V. R42, C21
and C22 are installed to prevent circuit errors.
4-7
OTHER CIRCUITS
4-7-1
ENC 1 AND ENC 2 UNITS
Pulse signals
(SV) from
the rotary encoder
are fed into
transistors QA and QB.
When the T1 SV signal is "LOW", QA and QB are turned OFF
and output from QB is "HIGH". When the T2 SV signal is
"HIGH" QA and QB are turned ON and output from QB is
"LOW".
4—19
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