the speaker output signal is applied to IC16(b) through the
[ANTI-VOX] CONTROL on the top panel. Amplified signals
from
1C16(b) are rectified by 0131
and pass into variable
attenuator Q59. The [ANTI VOX] CONTROL thus depends
on output from the speaker to control the VOX circuit. In CW
and RTTY modes, input signals from the VOX circuit are cut
by
Q59
and
the
VOX
function
does
not
work
with
microphone input signals.
4-2-18
METER SWITCHING CIRCUIT
The front panel meter is a multifunction meter so it has the
capability
of
indicating
several
transceiver
meter
measurements. Meter functions are changed through use of
a CMOS
analog switching IC chip (ICS).
The signal output from each detector in transmit mode is
applied to the [METER]
SWITCH
on the front panel. The
[METER] SWITCH selects the desired information and the
selected signal passes to IC8(c) on the MAIN UNIT.
The signal output from each detector in receive mode has
two different signal lines. In FM mode, IC8(a) cuts the signal
strength signal for modes other than FM and selects the FMS
line for FM signal strength signals.
IC8(a) and IC8(b) are used for receiving. IC8(c) is used for
transmitting.
4-2-19
FILTER SWITCHING CIRCUIT
The filter selector circuit consists of a CMOS four channel
multiplexer,
IC3. The signals for each
mode
and for the
[FILTER] SWITCH positions (IN or OUT) on the front panel
are applied to input terminals A to C on
IC3. Output
terminals 0 to 7 output a signal which accords with input
signal combinations. The output signal is divided into four
different lines such as three 9MHz filter lines and a 455kHz
filter line.
In FM mode, signals pass through FI6, a 455kHz filter. The
switching circuit selects FI6 only, so signals will not pass
through any 9MHz filters used for signals in other modes.
Refer to the FILTER COMBINATION table in SECTION 11-5
for further information.
The [FILTER] SWITCH on the front panel of the IC-751A
selects two receive filter systems for SSB, CW, RTTY or AM
modes when
it is placed in the IN or OUT
positions. The
IN/OUT
relationship of the [FILTER]
SWITCH
may
be
reversed
by
using
the
internal
FILTER
REVERSE
SWITCHES,
S3
AND
S4.
Refer
to
SECTION
11-1
OPTIONAL FILTERS for further details.
4-3
POWER SUPPLY CIRCUITS
4-3-1
8V REGULATOR CIRCUIT
This circuit supplies regulated 8V signals both in receiving
and transmitting. These 8V signals are generated by a three-
terminal voltage regulator IC chip (IC17) on the MAIN UNIT
after they pass from the METER SW UNIT as 13.8V signals.
TIMING CHART FOR FULL BREAK-IN OPERATION
key UP
Pf
DOWN
BK IN
SEND
4
1
Transmitting
It
signal
4
1
1
works
Fig. 7
—
4-3-2
RECEIVE 8V (R8V) REGULATOR CIRCUIT
This circuit supplies R8V in receive mode, and consists of
Q65, Q66 and Q67. Q65 is used for regulating the voltage.
Q65 and Q67 prevent R8V from being supplied in transmit
mode.
4-3-3
TRANSMIT 8V (T8V) REGULATOR CIRCUIT
This circuit supplies T8V in transmit mode, and consists of
Q68, Q69 and Q70. Q68 is used for regulating the voltage.
Q69 and Q70 prevent T8V from being supplied in receive
mode.
4-3-4
POWER SUPPLY SWITCHING CIRCUIT
Switching of the regulated power supply voltage between
receive and transmit
mode
is performed
by an interface
circuit consisting of Q64, Q68 and Q69. The interface circuit
is connected to the SEND line. When the SEND line voltage
is more than 2V as detected by Q64, the R8V regulator circuit
functions; when the line voltage is between —0.3 and +0.8V,
the T8V regulator circuit functions.
Regulator switching timing chart
4-3-5
REGULATOR SWITCHING TIMING CIRCUIT
This circuit gives the PLL circuit a faster lockup time when
the [RIT] or [ATX] SWITCHES are turned ON.
Either R8V or T8V is applied to Q71 through D139 and D140.
When
both R8V and T8V are OV at the moment when the
receive mode is switched to transmit mode or vise versa, the
collector of Q71
is "HIGH" and the level is applied to the
MUTE circuit on the PLL UNIT.
4-4
PLL CIRCUITS
The PLL UNIT in the IC-751A is equipped with a reversed
heterodyne 1st mixer and a normal heterodyne 2nd mixer, so
PLL output has very accurate oscillation.
The
PLL
UNIT
outputs two oscillator signals for the RF
UNIT: a variable first local oscillator output (1st LO output)
of 70.55~100.45MHz necessary for the 1st mixer, anda fixed
local oscillator output (2nd LO output) of 61.44MHz neces-
sary for the 2nd mixer. A marker signal is also generated in
this unit and is sent to the RF UNIT.
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