Icom IC-751A Service Manual page 33

(4) Y1— DB5 (MEMORY READ)
This matrix selects a VFO mode or memory channel mode
when it is switched by the [VFO/M] SWITCH. Pin 22 of the
CPU is HIGH when the memory channel mode is selected.
There are 32 memory channels available for storage of
mode, frequency, and ham/general data.
(5) Y1— DB6 (HAM/GENERAL)
This matrix selects the ham band mode or general coverage
mode via the [HAM/GENE] SWITCH.
(6) Y¥1— DB7 (RIT ON/OFF)
This matrix turns ON and OFF the receive circuit via the
[RIT/ATX] SWITCH. The binary counter IC1(b), 1C1(a)
outputs receive signals from pins 13 and 1 respectively when
the [RIT/ATX] SWITCH is turned ON.
Output signals pass through the OR gate of R13 and D15 and
are fed to a one-shot circuit consisting of IC4(b), R14, and
C5. This circuit outputs a pulse signal to Q8 which turns ON
the RIT matrix (Y1-DB7). The XRO output from pin 44 then
becomes HIGH and turns on the receive circuit. When no
receive input signal is applied, XRO outputs no signal to turn
ON the reset circuit (which consists of IC3(c), 1C4(c), Di4,
R3, and C1), Thus the receive circuit is turned OFF by 1C1(b),
IC1(a).
Digital transistors Q4 and Q5 turn ON and OFF the receive
and transmit indicators on the DISPLAY UNIT. When both
pin 1 (ATX) and pin 13 (RIT) of IC1 are OFF and the RIT
setting of the CPU is ON, the matrix reset circuit (consisting
of IC3(c), IC3(d), IC5(c), IC3(a) and 1C3(b)) drives IC4(b)
which switches the CPU RIT matrix ON and OFF, matching
the condition of the CPU and the front panel display. The
RIT matrix is turned ON and OFF by the multi-vibrator of
IC3(a) and IC3(b).
RIT/ATX CIRCUIT
from LOGIC UNIT
(7) Y2— DBO (FUNCTION)
This matrix selects a function by combining switches as
shown in the following table.
FUNC| + Selects FM mode.
FUNG] + Selects CW-NARROW mode.
FUNC] + Selects RTTY-NARROW mode.
Selects reverse side band.
FUNC] + (LSB or USB).
— Selects VFO transfer direction.
FUNC} + (A~BorB-A)
Adds RIT/ATX Af to display
FUNC] + [CLEAR] | frequency.
FUNC} + LWRITE} | Clears (blanks) the displayed
FUNC]+ [mM > veo] | Memory channel frequency.
(8) Y2—~ DB3 (RIT/ATX CLEAR)
This matrix clears the receive/transmit shift frequency.
When combined with the [FUNCTION] SWITCH, the shift
frequency is added to or subtracted from the displayed
frequency.
(9) Y2— DB4(VFO A= B)
This matrix transfers the frequency of VFO A to VFO B.
When combined with the [FUNCTION] SWITCH the original
VFO is reversed. See table on p. 4-17.
XRO(RIT LED OUT) Q4
1 eo ATX)
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