HP Vectra Technical Reference Manual page 402

NMI Circuit
(Parity Enable)
clr
0
latch
Parity
Check
Line
(I/O Channel Check Enable)
Port 61H NO
bit 3
latch
0
~
clr
latch
1/0
0
Channel
Check
(Hard Reset Enable)
Port 78H NQ
bit 7
latch
0
Port 61H
bit 2
Hard
Reset
From Keyboard
(NMI Enable)
clr
latch
latch
NO
o
o
o
Port 70H
-----.--------1
bit 7·
latch
Figure 0.2
I/O Port Map 393