HP Vectra Technical Reference Manual page 390

APPENDIX D
D. I/O PORT MAP
Appendix D describes the I/O map of the system. Table D.1 lists the I/O map of all devices
integrated in the System Processing Unit (SPU). Table D.2 lists the recommended I/O port
assignments for devices in adapter cards. Subsequent sections in the appendix describe the SPU
built-in devices individually. I/O devices in adapter cards are described fully in the Vectra Technical
Reference Manual, Volume I.
Table D.1
SPU I/O Map
I/O Address
000-01 FH
020-03FH
040-05FH
060H
061H
064H
068H
069H
06AH
06C-06FH
070H
071H
078H
07CH
07DH
080-09FH
OAO-OBFH
OCO-ODFH
OFOH
OF1 H
OF8-0FFH
Description
First DMA Controller (8237A)
Master Interrupt Controller (8259A)
Timer Controller (8254)
Keyboard Buffer Full port
SPU Control port
Keyboard Output Buffer Full (OBF) port
Keyboard Extended Command port
SVC Service Request read data port
Keyboard Handshake port
HP-HIL Controller ports
RTC address / NMI disable port
RTC data
Hard Reset NMI enable port
HP-Slave Interrupt Controller (8259A) port 0
HP-Slave Interrupt Controller (8259A) port 1
DMA Page Registers ports
Industry Standard (STD) Slave Interrupt Controller (8259A)
Second I)MA Controller (8237A)
Clear 80287 Coprocessor port
Reset'" " "
80287 Math Coprocessor
1/0 Port Map 381