HP Vectra Technical Reference Manual page 399

Table D.8
PORT 61 H Bit Values
When 80286 reads port 61 H:
Bit Data
7
6
5
4
3
1
0
2
1
0
1 1
0
1
Definition
Parity error in on-board system ram
I/O channel check error has occurred
Output from timer channel 2
Refresh detect; toggles once per refresh cycle
Status of I/O channel check NMI latch (See Fig D.2)
Disabled.
Enabled
Status of SPU RAM parity error latch (See Fig D.2)
Disabled
Enabled
Speaker data from timer channel 2 is enabled to drive speaker circuit.
Gate to timer channel 2 is enabled
When 80286 writes port 61 H:
Bit Data Description
7-4 Not used
3 1 Disable and clear I/O channel check.
2 1 Disable and clear on-board parity NMI
1 1 Enable the data from timer channel 2 to drive speaker circuit.
o
1
Enable gate to timer channel 2. (speaker data)
0.6 Speaker Control
Figure D.1 shows the relationship of the timer channel 2 and the rest of the speaker circuit.
390 I/O Port Map