HP Vectra Technical Reference Manual page 393

Table D.4
1/0
Port Addresses and Address Lines
DMA page register I/O Ports
Channel I/O port Address Lines
0
087H
A23-A 16
1
083H
A23-A 16 byte transfers
2
081H
A23-A 16
3
082H
A23-A 16
4
Not connected
5
08SH
A23-A 17
6
089H
A23-A 17 word transfers
7
08AH
A23-A 17
X
08FH
Used for RAM refresh
DMA Controller I/O Ports
Channel I/O port
0
OOOH
address register (A 15-AO)
001H
byte count register
1
002H
address register (A 15-AO)
003H
byte count register
2
004H
address register (A 15-AO)
byte transfers
OOSH
byte count register
3
006H
address register (A 15-AO)
007H
byte count register
4
OCOH
address register (A 16-A1)
OC2H
word count register
5
OC4H
address register (A 16-A1)
OC6H
word count register
word transfer
6
OC8H
address register (A 16-A1)
OCAH
word count register
7
OCCH
address register (A 16-A1)
OCEH
word count register
Notes:
Channel
4
(first channel on the second
DMA
controller) is used to cascade the first
DMA
controller and it must not be programmed for
DMA
transfers.
384 I/O Port Map