Table D.2
Adapter 1/0 Map
I/O Address
Description
1FO-1 F3H
Hard Disc controller
200-207H
Game
I/O
adapter
278-27FH
Parallel port 2
2E8-2EFH
Serial port 3
2F8-2FFH
Serial port 2
300-307H
Prototype adapter card
320-323H
Reserved
378-37FH
Parallel port 1
380-38FH
SDLC, bisynch 2
3AO-3AFH
Bisynch 1
3BO-3B7H
Monochrome display adapter
3BC-3BFH
Monochrome display/Parallel adapter
3DO-3DFH
Color Graphics adapter
3E8-3EFH
Serial port 4
3FO-3F7H
Flexible Disc controller
3F8-3FFH
Serial port 1
0.1
OMA Channel Controller
The SPU supports seven DMA channels using two Intel 8237A DMA controllers in cascade mode.
For each DMA channel there is a page register used to extend the addressing range of the
channel to 16 MS. The only type of DMA transfer allowed is
"1/0
to memory". No
"1/0
to I/O" or
"memory to memory" transfers are allowed due to the way the hardware is configured. For
more detailed information on the 8237A DMA controllers see Intel's The 8086 Fami/y User's
Manual.
Table D.3 summarizes how the DMA channels are allocated.
382
I/O Port Map
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