Second Level Cache; Memory - NEC DIRECTION L Manual

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Second Level Cache

The second level cache (L2) consists of 512 MB of pipeline
burst static RAM (PBSRAM). Also called external cache
memory, it is part of the SEC cartridge and cannot be
expanded.

Memory

With three dual in-line memory module (DIMM) sockets,
memory is expandable to 384 MB; minimum memory size
is 8 MB.
NOTE
correcting) DIMMs or non-ECC DIMMs, but you
should not mix them.
The BIOS automatically detects memory type, size and
speed. All main memory can be cached. The system board
supports
T
168-pin 3.3V DIMMs with gold-plated contacts.
T
Up to 384 MB of unbuffered 66 MHz , 4-clock
Synchronous DRAM (SDRAM) memory; this improves
memory speed and system performance through memory
access that is synchronous with the memory clock
T
3.3V memory only
T
ECC (72-bit) and non-ECC (64-bit) memory
T
Single- or double-sided DIMMs
C-2 System Specifications
You can use either ECC (error-checking and

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