6 Flash
RTL8762CJ, RTL8762CK needs external flash, and available Flash is mentioned in Flash QVL.
RTL8762CJF, RTL8762CKF contains internal Flash.
6.1 Bypass Flash Code
If P0_3 is pulled low, the code in flash would be bypassed (not be erased) and IC would
execute Rom code when RTL8762C power on or reset.
(Note: P0_3 will be changed to Log output after power-on. It is necessary to return P0_3 to
the floating state as soon as possible after power-on, or pull P0_3 down to GND with 500ohm
series resistor.)
If P0_3 is not connected (P0_3 internally pull high by default), IC would execute flash code
when RTL8762C power on or reset. P0_3 has internal pull-high configuration.
6.2 External Flash
External Flash should be connected to RTL8762CJ/CK SPIC interface. It could support 1-bit
mode (Standard SPI), 2-bit mode and 4-bit mode (QSPI). In QSP mode, P1_3 and P1_4 need to be
connected to Flash, and cannot be used as normal IO. The corresponding circuit is shown in the
figure below. Please refer to reference design for details.
For external Flash, running SPI CLK 20MHz is required during XIP. At the same time, it is
necessary to pay more attention to layout.
For FM series Flash, WP and HOLD pin do not have internal pull high. Therefore, when applying
1-bit mode, it is required to externally pull high the two pins.
As to the Flash supported by RTL8762C, please refer to the RT8762C Flash AVL document for
more details.
Figure6.1 Flash reference circuit
RTL8762C Evaluation Board User Manual
11
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