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Summary of Contents for Realtek RTL8762C
- Page 1 RTL8762C Evaluation Board User Manual RTL8762C Hardware Instruction V 2.2 2019/8/23...
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Page 2: Table Of Contents
RTL8762C Evaluation Board User Manual Catalogue Catalogue ............................. 1 1 Special Instruction ........................3 2 Features Table .......................... 4 3 Reset ............................5 4 Crystal Requirements ....................... 6 4.1 Frequency offset calibration instructions ................7 4.1.1 Same capacitance settings for all PCBs ..............7 4.1.2 Individual calibration for each PCB ................ - Page 3 13.7 MISC ..........................30 13.8 ESD Layout ........................31 13.9 MP Test Points ......................33 14 Layout Rules for Two-layer Board ..................34 15 ESD Protection for MP ......................35 16 Debug Process ........................36 17 Differences between RTL8762A & RTL8762C ..............37...
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Page 4: Special Instruction
RTL8762C Evaluation Board User Manual 1 Special Instruction In this document, all states without special parts are applicable to both RTL8752C and RTL8762C series ICs. Generally, “IC” refers to RTL8762C in this document. -
Page 5: Features Table
RTL8762C Evaluation Board User Manual 2 Features Table RTL8762C feature table RTL8762CJ RTL8762CJF RTL8762CK RTL8762CKF RTL8752CJ RTL8752CJF package QFN40 QFN40 QFN48 QFN48 Flash type external external internal internal VBAT range 1.8~3.3V IO number AUX ADC channel number UART IR T/RX... -
Page 6: Reset
RTL8762C Evaluation Board User Manual 3 Reset HW_RST_N pin is used as RESET and is active-low. It is a high impedance port with an internal weakly pull high (~100K ohm) resistance. It is recommended to add an external capacitor to the... -
Page 7: Crystal Requirements
RTL8762C Evaluation Board User Manual 4 Crystal Requirements 40MHz crystal: Clock source for MCU in active state. RTL8762C could use the 40M crystal with CL of 7~12 pf. Please refer to the rBom list in the HDK documentation for crystal oscillator specifications. -
Page 8: Frequency Offset Calibration Instructions
RTL8762C Evaluation Board User Manual 4.1 Frequency offset calibration instructions According to the mass production calibration strategy, frequency offset calibration is processed in two cases. 4.1.1 Same capacitance settings for all PCBs If all PCBs use a uniform capacitor setting, follow the procedure below to find the optimum capacitor setting value. -
Page 9: Crystal Start-Up Waiting Time Setting
RTL8762C Evaluation Board User Manual The smaller the CL is, the larger the frequency offset step of each internal capacitor is. For crystal with CL=12/15pF, external capacitor is needed to make the frequency offset within 30~35KHz before performing calibration. - Page 10 RTL8762C Evaluation Board User Manual the 40MHz XTAL is 10pF here. Part of the crystal start-up time data is attached. Figure 2 Start-up time waveform (external cap = 10pF) To ensure the IC working normally, the LOP_xtal_delay time must be set greater than the XTAL setting time to avoid IC crash.
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Page 11: Pad
RTL8762C Evaluation Board User Manual 5 PAD RTL8762C has 3 types of IO PAD: Digital IO, analog/digital IO and special/digital; Digital IO: Only used for digital signal, supports all function in pin mux table. Analog/Digital IO: supports ADC (include AUXADC and Audio ADC) and all digital IO function. -
Page 12: Flash
For FM series Flash, WP and HOLD pin do not have internal pull high. Therefore, when applying 1-bit mode, it is required to externally pull high the two pins. As to the Flash supported by RTL8762C, please refer to the RT8762C Flash AVL document for more details. -
Page 13: Audio Microphone
Otherwise, it will seriously affect the performance of Microphone. 7.2 Digital MIC Digital MIC connection to RTL8762C is shown in the following schematic. Any IO can be used to connect to digital MIC CLK and DATA pin, because RTL8762C can use PINMUX function to... -
Page 14: Omnidirectional Condenser Mic
RTL8762C Evaluation Board User Manual 7.3 Omnidirectional Condenser MIC For condenser microphones, it is recommended to use differential mode connection. The reference circuit is shown as below. -
Page 15: Auxadc & Lpc
VBAT and the IC may start unexpectedly. The RTL8762C has a built-in low-power comparator that can wakeup the chip when the voltage is greater or less than the setting value. It can be switched to either ADC Channel or VBAT Channel. - Page 16 RTL8762C Evaluation Board User Manual value may be unstable. It is recommended to calculate average value after sampling multiple times. If VCC itself fluctuates, it is suggested to place a larger capacitor on C2 to suppress fluctuations. Divide mode (range: 0~3.3V)：...
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Page 17: Dc/Dc Buck Converter
9 DC/DC Buck Converter RTL8762C integrates a DC/DC Buck converter. HVD pin is used as Buck input pin, while LX pin is used as Buck output pin. A 4.7uF cap must be attached to HVD pin, and LX pin must be connected to a 2.2uH power inductor. -
Page 18: Efuse Programming
VBAT must be exactly 2.5V (±10%) when programming eFuse. eFuse area can only be written once. Hence, make sure that the data to be burnt is correct before programming eFuse. As to when to write eFuse, refer to the RTL8762C Security Mechanism User Guide. -
Page 19: Antenna
RTL8762C Evaluation Board User Manual 11 Antenna 11.1 PCB Antenna Although the PCB antenna occupies a large area, it has the advantage of low cost, easy production and sufficient wireless communication distance, etc. An antenna is usually a straight line of 1/4 wavelengths. In mobile devices, antennas are usually designed as a curve to reduce the size of the mobile devices. -
Page 20: Thimble Antenna
RTL8762C Evaluation Board User Manual Figure11.1 Antenna design The clearance area means that no other component is allowed to be placed except antenna itself. In the four different designs shown in Fig.(a)-Fig.(d), Fig.(a) has the best performance, because the design deletes the redundant GND area to ensure sufficient clearance area. -
Page 21: Rf Circuit
PCB antenna or chip antenna. The matching network in IC RF trace is also designed for harmonic suppression. It is strongly recommended to follow Realtek HDK instruction, and choose exactly the same products as those in QVL. Otherwise, the performance cannot be guaranteed. - Page 22 RTL8762C Evaluation Board User Manual Trace width W: Smaller W will lead to higher impedance. Height from trace to ground H: The impedance decreases when H is increased. The gap between RF trace and adjacent ground G: The impedance decreases when gap is decreases. Notice that gap must be symmetrical on both sides of the trace.
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Page 23: Pcb Layout Guide
RTL8762C Evaluation Board User Manual 13 PCB Layout Guide 13.1 Component Layout Order Arranging the components should follow the order below. The higher priority indicates that the component should be closer to IC. 1. DC/DC circuit components 2. VBAT bypass capacitor 3. - Page 24 RTL8762C Evaluation Board User Manual The LX must go through inductor first, then through the capacitor and Inductor finally through branch out!! The switching signal LX must be short and wide. The capacitor must place next to the inductor Put more than one ground...
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Page 25: Power Bypass Capacitor Layout
RTL8762C Evaluation Board User Manual There should be no signal trace under the buck inductor body, which means keeping copper plane of the back layer (BOT) complete. There is no GND copper between the pads of wire wound inductor. - Page 26 RTL8762C Evaluation Board User Manual 4. The bypass capacitor of the power supply should be placed close to the power pin. All of the power trace should go through capacitor first, then go into IC, and finally go outside for other branches.
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Page 27: External Flash Layout
RTL8762C Evaluation Board User Manual 1.2V power net GND VIA 13.4 External Flash Layout The external Flash needs to be placed as close as possible to the IC, and all signal trace should follow length-matched paths as much as possible. - Page 28 RTL8762C Evaluation Board User Manual may be necessary to seek a better PCB maker causing higher cost. It is suggested that the RF trace should be no less than 8mil to avoid the large variation of RF impedance. Communicate with the PCB maker to ensure that the parameters are appropriate.
- Page 29 RTL8762C Evaluation Board User Manual The component and trace should be placed following the rules example below, and the RF trace should go straight forward and appropriately routed. CORRECT Follow route example, the trace must straight forward. extra branch trace matching allowed.
- Page 30 RTL8762C Evaluation Board User Manual Correct The copper is not completely divided by trace The ground via of the RF components should be as close to the soldering pad as possible. GND Via should be connected to the GND layer directly instead of TOP layer. The copper grounding should be covered.
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Page 31: 40Mhz Crystal Layout
RTL8762C Evaluation Board User Manual It is suggested that a complete GND via array should be placed to protect the RF trace (shown in yellow rectangular marked below). The layout and component placement should be as concentrated as possible to reserve more space for a bigger antenna, and keep more RF clearance area. -
Page 32: Esd Layout
RTL8762C Evaluation Board User Manual Error: Parallel traces at layer1 and layer2. Correct: Fine tune the trace to make them parallel nearby layers. External Flash must be placed as close as possible to IC. No copper between IC Pin PAD and EP PAD, and GND PAD must be directly connected... - Page 33 RTL8762C Evaluation Board User Manual and farther away from the protected IC than the ESD source. The ESD source needs to be directly connected to the TVS during wiring to reduce the parasitic inductance between the TVS tube and backflow GND.
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Page 34: Mp Test Points
RTL8762C Evaluation Board User Manual Try to shorten the trace length to reduce parasitic inductance. Since the right angle traces would produce more electromagnetic radiation, it is suggested to avoid the right angle traces connected to the device or trace, especially in the design of high-speed circuits. -
Page 35: Layout Rules For Two-Layer Board
RTL8762C Evaluation Board User Manual 14 Layout Rules for Two-layer Board Avoid routing in these areas: BT CHIP, RF, Crystal and Buck area. The traces of 2-layer board should be routed at the same layer. The traces must run through the bottom layer, and the traces on the back side should be as short or concentrated as possible to maintain the integrity of the copper. -
Page 36: Esd Protection For Mp
RTL8762C Evaluation Board User Manual 15 ESD Protection for MP The machine that brushes the solder paste needs to be grounded. The PCB to be processed needs to be placed on the insulating tray. If it is placed on a metal plane or a tabletop, the plane (table) surface needs to be grounded. -
Page 37: Debug Process
RTL8762C Evaluation Board User Manual 16 Debug Process Power on the IC after P0_3 is pulled low. (Flash bypass) Check the correctness of VBAT/VDDIO voltage which should be within the range specified in the Datasheet. Check whether the 1.2V of SWR has an output and the voltage is correct or not. -
Page 38: Differences Between Rtl8762A & Rtl8762C
RTL8762C Evaluation Board User Manual 17 Differences between RTL8762A & RTL8762C There are changes in 40MHz Crystal request. RTL8762C can only use crystal with CL=<9pF. PAD has anti-backflow mechanism. All PADs support wakeup function without limitation. PAD can support 1 set of AON debounce.
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