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User Guide
EVALUATION BOARD HARDWARE GUIDE
ANALOG INPUT CIRCUIT
The EVAL-AD4080-FMCZ includes a three stage, precision signal
conditioning circuit. The design was partitioned in this fashion to al-
low the greatest flexibility in optimizing signal chain performance for
the targeted signal bandwidth for both evaluation and prototyping.
With the default configuration of the evaluation hardware, a differen-
tial 6 V p-p input signal with the common mode set to 1.5 V results
in a full-scale measurement from the ADC. The typical supported
input frequency range is DC to 4 MHz.
Recommendations regarding signal chain configuration for particu-
lar signal bandwidths of interest can be found in the
End (AFE) Considerations
section.
INPUT STAGE (STAGE 1)
The input stage consists of a pair of
The LT6236 op amps were selected for its exceptional wideband
(90 MHz), low noise, favorable distortion performance and low
power consumption. The stage is configured for differential input,
differential output, noninverting, unity-gain operation, ensuring that
a preceding signal source or sensor is presented with a high
impedance. With supply rail values of +5 V and −2.5 V, the valid
range for the LT6236 inputs (INP and INM) is approximately −0.8
V to +4 V, which means that a common-mode voltage of 1.5 V
(available at V
) for the inputs is close to ideal to allow maximum
OCM
voltage excursion and minimize distortion.
Figure 3. Stage 1 Simplified Schematic
The following can be configured in this stage:
Stage bandwidth
►
No explicit bandwidth limiting (default)
►
Band limiting through RC input filter and/or capacitors across
►
amplifier feedback
Stage gain
►
Unity gain (default)
►
Noninverting gain setting
►
Stage bypass
►
No bypass (default)
►
Bypass Stage 1
►
analog.com
Analog Front
LT6236
op amps (U1 and U2).
Bypass Stage 1 along with Stage 2 to use an amplifier mezza-
►
nine card (AMC) instead
Input signal type
►
Differential (default)
►
Single-ended
►
FULLY DIFFERENTIAL AMPLIFIER STAGE
(STAGE 2)
Stage 2 is based around an
ADA4945-1
amplifier configured for unity gain.
Figure 4. Stage 2 Simplified Schematic
The clamp pins of the ADA4945-1 (−V
nected to the VREF and GND nodes, which results in a limitation
of the range at the output of the fully differential amplifier (FDA)
of ~500 mV beyond those nodes to protect the ADC from hard
overdrive.
The common-mode input of the ADA4945-1 is floating by default,
meaning that the output common-mode value is internally biased at
a voltage equal to the midpoint between the output voltage clamps,
that is, 1.5 V.
With the default configuration, this stage presents a 3 dB cutoff
frequency of 5.5 MHz at the output (measured at FDA_ON and
FDA_OP nodes).
The following can be configured in this stage:
Stage bypass
►
No bypass (default)
►
Bypass Stage 2
►
ADA4945-1 power mode
►
Full power mode (default) achieves the maximum device
►
bandwidth and best distortion performance.
Low-power mode minimizes power at the cost of distortion
►
performance and reduces the amplifier bandwidth.
Alternative amplifier installation
►
ADA4940-1
►
EVAL-AD4080
(U3) fully differential
and +V
) are con-
CLAMP
CLAMP
Rev. 0 | 4 of 19
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