Signal Terminations; Multiplexed I/O ﴾Mio﴿ Pins - Enclustra Mercury+ XU6 User Manual

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NOTICE
Damage to the device due to unsuitable voltage
Unsuitable voltages may damage the MPSoC device as well as other devices on
the Mercury+ XU6 SoC module.
NOTICE
Damage to the device due to floating V_IO pins
Floating V_IO pins reduce ESD protection.
CAUTION
Injury due to uncontrolled device
If an I/O is connected to an external device, violating the power sequence or leav‐
ing the corresponding V_IO pin floating will leave the pin in an undefined state.
This can lead to any behavior of the devices attached to this pin and, potentially,
to damage or injuries.
2.8.6

Signal Terminations

Differential Inputs
Internal differential termination is not supported for the HD pins ﴾banks 24, 25, 26, 44 on ZU2/ZU3 devices,
and banks 43, 44, 45, 46 on ZU4/ZU5 devices﴿. Differential input pairs on the module connector may be
terminated by external termination resistors on the base board ﴾close to the module pins﴿.
Single‐Ended Outputs
There are no series termination resistors on the Mercury+ XU6 SoC module for single‐ended outputs. If
required, series termination resistors may be assembled on the base board ﴾close to the module pins﴿.
2.8.7
Multiplexed I/O ﴾MIO﴿ Pins
Details on the MIO/EMIO terminology are available in the Zynq UltraScale+ MPSoC Technical Reference
Manual [21].
Some of the MIO pins on the Mercury+ XU6 SoC module are connected to on‐board peripherals, while
others are available as GPIOs; the suggested functions below are for reference only ‐ always verify your
MIO pinout with the Xilinx device handbook.
Table
11
gives an overview over the MIO pin connections on the Mercury+ XU6 SoC module. Only the
pins marked with "user functionality" are available on the module connector.
D‐0000‐464‐001
Only use V_IO voltages compliant with the assembled MPSoC device.
Do not leave any V_IO pin floating.
Follow the power sequence diagram shown in Figure 10. This ensures that
the I/Os are tri‐stated at power‐on and power‐off.
Do not leave V_IO pins floating.
25 /
60
Version 03, 24.10.2023

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