Cypress CapSense CY8C20396 Specification Sheet page 11

32-Pin QFN
Table 5. Pin Definitions - CY8C20436/46/66 PSoC Device
Type
Pin
Name
No.
Digital Analog
1 IOH I P0[1]
2 IO I P2[7]
3 IO I P2[5]
4 IO I P2[3]
5 IO I P2[1]
6 IO I P3[3]
7 IO I P3[1]
8 IOHR I P1[7]
9 IOHR I P1[5]
10 IOHR I P1[3]
11 IOHR I P1[1]
12 Power Vss
13 IOHR I P1[0]
14 IOHR I P1[2]
15 IOHR I P1[4]
16 IOHR I P1[6]
17 Input XRES
18 IO I P3[0]
19 IO I P3[2]
20 IO I P2[0]
21 IO I P2[2]
22 IO I P2[4]
23 IO I P2[6]
24 IOH I P0[0]
25 IOH I P0[2]
26 IOH I P0[4]
27 IOH I P0[6]
28 Power Vdd
29 IOH I P0[7]
30 IOH I P0[5]
31 IOH I P0[3]
32 Power Vss
CP Power Vss
LEGEND A = Analog, I = Input, O = Output, OH = 5 mA High Output Drive, R = Regulated Output.
Document Number: 001-12696 Rev. *D
[2, 3]
Description
Integrating input
Crystal output (XOut)
Crystal input (XIn)
I2C SCL, SPI SS
I2C SDA, SPI MISO
SPI CLK.
[1]
ISSP CLK , I2C SCL, SPI MOSI.
Ground connection.
[1]
ISSP DATA , I2C SDA., SPI CLK
Optional external clock input
(EXTCLK)
Active high external reset with
internal pull down
Supply voltage
Integrating input
Ground connection
Center pad must be connected to
ground
CY8C20x36/46/66, CY8C20396
Figure 5. CY8C20436/46/66 PSoC Device
AI, P0[1]
1
AI, P2[7]
2
AI, XOut, P2[5]
3
AI, XIn, P2[3]
4
AI, P2[1]
5
AI, P3[3]
6
AI, P3[1]
7
AI, I2C SCL, SPI SS, P1[7]
8
24 P0[0], AI
23 P2[6], AI
22 P2[4], AI
QFN
21 P2[2], AI
20 P2[0], AI
(Top View)
19 P3[2], AI
18 P3[0], AI
17 XRES
Page 11 of 34
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