Quectel RG255C-GL Hardware Design page 17

Mini pcie module
Table of Contents

Advertisement

14
USIM_RST
15
GND
16
RESERVED
17
RI
18
GND
19
RESERVED
20
W_DISABLE#
21
GND
22
PERST#
23
CTS
24
RESERVED
25
RTS
26
GND
27
GND
28
NC
29
GND
30
I2C_SCL
31
DTR
32
I2C_SDA
33
RESERVED
34
GND
35
GND
RG255C-GL_Mini_PCIe_Hardware_Design
DO
(U)SIM card reset
Ground
Reserved
DO
Ring indication
Ground
Reserved
DI
Airplane mode control
Ground
DI
Fundamental reset
Clear to send signal to
DI
the module
Reserved
Request to send signal
DO
from the module
Ground
Ground
Not connected
Ground
I2C serial clock
DO
(for external codec)
DI
Sleep mode control
I2C serial data
DIO
(for external codec)
Reserved
Ground
Ground
5G Module Series
USIM_VDD
3.3 V
Pulled up by
3.3 V
default.
Active low.
Pulled up by
3.3 V
default.
Active low.
3.3 V
3.3 V
Requires
1.8 V
external pull-up
to 1.8 V.
3.3 V
Requires
1.8 V
external pull-up
to 1.8 V.
16 / 57

Hide quick links:

Advertisement

Table of Contents
loading

Table of Contents