Counter/Timer Register Data - Ametek DN VR-608 Series User Manual

Table 2-2 Counter/Timer Register Data
Mode CRR
Number of rising edges
Timed (reset by Z-tooth
detection)
TPPM n/a
Number of rising edges
Z-Pulse (reset by Z-tooth
detection)
N-Pulse n/a
Torque n/a
Quadrature Pulse count (reset by
Decoder Z-tooth detection)
2.2.4.2 Interpreting
Count
Register Data
© Copyright 2024
United Electronic Industries, Inc.
The following Counter/Timer modes are designed for dual VR sensors and must
therefore be configured as a pair:
• Torque: measures the time delay between pulses on the even and odd
channels (Revision 2 only).
• Quadrature Decoder: counts pulses on the even channel; the counter
increments or decrements depending on whether the odd channel leads
or lags.
Table 2-2 summarizes the contents of the Counter/Timer registers in each
mode. Some registers remain unused in certain modes.
CR
Cumulative number
of rising edges
n/a
Cumulative number
of rising edges
n/a
n/a
Pulse count
(adds or subtracts
from 0x80000000
depending on
direction)
NOTE: On Revision 2 boards, a stalled input clears the CRR, CRH, and CRL
counters. The measurement interval restarts when the input is
reconnected.
This section describes how to compute the shaft's rotational properties from the
raw counter data. The software automatically converts raw counter data when
reading immediate values in Timed, Z-Pulse, TPPM, or N-Pulse mode. Torque
mode data and any data read from the FIFO need to be converted manually.
February 2024
DNx-VR-608 Variable Reluctance Interface
Functional Description
CRH
Time in 66 MHz
clocks from the first to Number of rising
last rising edge in the edges during CRH
configured interval
Number of pulses
Counts (clock ticks) observed in the
measurement window
Time in 66 MHz
clocks from the first to Number of rising
last rising edge in the edges during CRH
configured interval
Total HI time in Total LO time in
66 MHz clocks 66 MHz clocks
Total HI time in
66 MHz clocks (time
Total LO time in
between rising edges
66 MHz clocks
on the even and odd
channels)
n/a n/a
Chapter 2 17
CRL
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