Enable Channels - Ametek DN VR-608 Series User Manual

8-channel variable reluctance sensor interface for the powerdna cube and rack series chassis
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5.4.1.7
Sync Out
(Rev. 2)
//Set Sync 2 to pulse on channel 5 end of measurement
extcfg.sync_out = DQ_VR608_SYNC(
DQ_VR608_CFG_SYNC_OFF,
DQ_VR608_CFG_DO_EM5,
DQ_VR608_CFG_SYNC_OFF,
DQ_VR608_CFG_SYNC_OFF);
5.4.1.8
VR Simulator
Configuration
(Rev. 2)
//Connect DOut0 to virtual simulator channel 0.
extcfg.cfg_flags |=
DQ_VR608_CFGVLD_D_OUT;
extcfg.d_out = DQ_VR608_DBG_N(
DQ_VR608_CFG_DO_DBG_OFF,
DQ_VR608_CFG_DO_DBG_OFF,
DQ_VR608_CFG_DO_DBG_OFF,
DQ_VR608_CFG_DO_SIG_SIM0);
//Program VR-608 rev.2 and enable operations.
DqAdv608SetCfgExt(hd, DEVN, 0, front_cfg, mode, &extcfg);
DqAdv608Enable(hd, DEVN, 0xFF);
//Configure the simulator after layer is enabled.
//Simulate 2000 rpm, 36 ppr, and one missing tooth on
//simulator channel 1.
DqAdv608SetSensorSim(hd, DEVN, 1, 2000, 36, DQ_VR608_SIM_Z_PULSE, 0);
5.4.2
Enable
Channels
// Get the configuration for each channel on a VR-608 rev.1
DqAdv608GetCfg(hd, DEVN, chnl, &front_cfg, &mode, &extcfg);
// Enable all eight channels.
DqAdv608Enable(hd, DEVN, 0xFF);
© Copyright 2024
United Electronic Industries, Inc.
On Revision 2 boards, use the sync_out member of the DQ_VR608_CFG_R2
structure to configure the output signals on the SYNC bus. The
DQ_VR608_SYNC macro takes arguments for each of the sync out lines
(D3...D0). Signal selection works the same as for digital outputs.
Digital outputs can be used to generate simulated VR signals on Rev.2 boards.
A simulator can only be assigned to its corresponding DOut, e.g., Sim0 to
DOut0.
To verify that parameters were set as desired, read back the configuration as:
Once all desired channels have been configured, enable operation with a mask:
The VR-608 is now in operating mode.
February 2024
DNx-VR-608 Variable Reluctance Interface
Programming with the Low-level API
Chapter 5
50
www.ueidaq.com
508.921.4600

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