External Frequency Counter; External Divide; Trigger; Timing - HP 8133A Service Manual

TRIGGER

Timing

Output Levels

2-2 HP 8133A Pulse Generator Specifications

External Frequency Counter

You can measure and display the frequency of
signal:
FREQUENCY
(2 to 3.50
Resolution:

External Divide

You can divide the external clock signal by:
2, 4, 8, 16, 64
as long as the internally available (divided) signal frequency
except for Option 002 PULSE/DATA Channel 2.)
All specification:; apply for Trigger Output frequency
I
Timebase Frequency divided
(Minimum:
Propagation Delay: typical, External Input
6
to Trigger Channel Output,
with Trigger and External
You can set the Trigger Output levels in terms of either
offset level doubles into open circuits:
Voltage Window:
Amplitude Range:
Resolution:
Maximum Externarl
Voltage:
the
333 ps to 30.3 ns
(286 ps to 500 ns typical)
typical)
(Option 002 only)
<
100 ps
(typically 60 PS)
5 ps (< 2 ps typical)
Timebase Frequency divided
by
:
3 MHz typical)
-2.0 ns typical,
on Channel 2 to Trigger
Channel Output
Dividers 1
=
-4.00 V to +4.00 V
0.50
V to 1.80 V
external clock
33
33 MHz.
BIT
0 mode
by 32
of Bit 0
load,