HP 8133A Service Manual page 141

3 ghz pulse generator
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Device Bus Interface
-
HP-IB Interface
Keyboard Controller
-
Display Control
value of timter B is 20, there is a timeout every 20 ms. Every time
timer B times out, it generates an interrupt.
Timer C is internally connected to the MFP clock (4 MHz). Its output
TCO is connected to RC and TC and serves
serial interface. Timer C prescaler is programmed to a value
counter is programmed
frequency od 9615.4 kHz on the output of timer C (TCO). The serial
interface is configured to operate at this frequency. This is sufficiently
close to 9600 baud, at which rate the terminal is configured.
The SI and SO signals of the MFP axe level-shifted by an RS232
transceiver (U26), and connected to jumper 53. U26 and the
capacitors CP4-CP7 are fitted in prototype boards only.
-
3D
The device bus interface is a bi-directional parallel interface with
long
125 ns) setup and hold times. The cycle time for a device bus
access is 13,uP clock cycles (1.625
and write cycle on the device bus. The output buffers for device
bus Address and Data are ACT gates, Which can sink or source up
to
70 mA. This is necessary to drive the filter capacitors on the
motherboard.
A latch (U3'2) is used to latch the pP address bus and generate the
device bus addresses and card selects. U27, U28 and U33 are used to
connect the device data bus to the pP data bus.
3C
The HP-IB controller provides the HP-IB interface. Interface lines are
buffered by two drivers. For a detailed description refer to the TMS
9914 Data Sheet.
3C
-
The front panel keys and LEDs are connected by the integrated
of
2 MHz. The internal prescaler
resulting in a scan rate close
buffered with an HCT gate (U20A). The signal lines AO-A3 and BO-B3
are buffered with an ALS gate (U25) because they drive the LEDs on
the front panel directly.
3C
The HPSP display modules on the keyboard are connected to the
bus on the motherboard via two latches (U38 and U39). These are
used to buffer the address
generates the chip select and write signals for the display Modules.
as a clock source for the
to
a value of 52. This results in
Figures 2 and 3 show a read
programmed to a value
is
to 1
and data bus. A demultiplexer (U29A)
4. Its
of
an
output
of
20,
Theory of
Operation
7-9

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