Getting Help ................................6 Introduction to the CYC5000 Board ................. 7 Layout and Components ........................... 7 Block Diagram ................................. 8 Connections and Peripherals of the CYC5000 Board ..........10 Board Status Elements .............................10 Clock Circuitry ..............................10 Peripherals Connected to the FPGA ......................11 3.3.1...
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Pinning Assignments ..........................51 5.2.13 Compiling the Design ..........................54 5.2.14 Reading the Compilation Report ...................... 55 Configuring the CYC5000 ....................57 Configure the FPGA in JTAG mode ......................57 QSPI flash memory programming ....................... 61 6.2.1 Programming File generation ......................61 6.2.2...
64-bit Linux / Microsoft Windows 10 operating system or later. 1.2 Useful Links A set of useful links that can be used to get relevant information about the CYC5000 board or the Cyclone V FPGA. CYC5000 at Arrow Shop •...
Here are the addresses where you can get help if you encounter any problems: • Arrow Electronics In Person Arrow EMEA + 49 (0) 6102 5030 0 Online https://arrow.com • Trenz Electronic GmbH https://www.trenz-electronic.de/en/ CYC5000 User Guide www.arrow.com Page | 6 March 2023...
It depicts the layout of the board and indicates the location of the various connectors and key components. Figure 1 – CYC5000 Board (top view) The following features are available on the CYC5000 board: • Intel Cyclone V 5CEBA2U15C8N device •...
Cyclone V FPGA device to provide maximum flexibility for users. Users can configure the FPGA to implement any system design. Figure 2 – CYC5000 Block Diagram FPGA Device • Intel Cyclone V 5CEBA2U15C8N device. Features of the FPGA on the CYC5000 Board: Device Resources 5CEBA2 Logic Elements (kLE) Adaptive Logic Module (ALM)
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Configuration and Debug • On-board Arrow USB Programmer2 (micro-USB type B connector) – JTAG mode Connectors & Headers CRUVI HS Connector • Arduino MKR compatible Header • Buttons and Indicators 2 Side-Buttons • 8 red user LEDs • • 2 board status LEDs...
The external clock of the system can be seen in Figure 4. The default clock (CLK12M) is at 12MHz and is connected and driving the FPGA’s user logic and the Arrow USB Programmer2. There is an optional clock input from CRUVI HS Connector, where you can add another preferred clock source to the FPGA (REFCLK).
Optional clock input 3.3 V Peripherals Connected to the FPGA 3.3.1 Communication and Configuration The CYC5000 board uses a single chip to perform configuration of the device and communication over USB. 3.3.1.1 USB Communication The FTDI chip converts signals from USB 2.0 to a variety of standard serial and parallel interfaces.
3.3 V BCBUS5 PIN_K18 Bidir D[5] of bidirectional data bus 3.3 V BCBUS6 PIN_K17 Bidir D[6] of bidirectional data bus 3.3 V BCBUS7 PIN_L16 Bidir D[7] of bidirectional data bus 3.3 V CYC5000 User Guide www.arrow.com Page | 12 March 2023...
Chapter 3.3.2 QSPI Configuration Flash Memory The CYC5000 board is integrated with a 64MBit of QSPI flash memory that can be used for user data and programming non-volatile storage. The configuration bitstream is downloaded into the configuration device which automatically loads the configuration data into the Cyclone V when the board is powered on.
Data [3] 3.3 V 3.3.3 SDRAM Memory The CYC5000 board supports single-chip SDRAM with 64Mbit density which can operate up to 166 MHz clock frequency. Below are the connections and pinning of the SDRAM used in the CYC5000. Figure 8 – SDRAM Connections CYC5000 User Guide www.arrow.com...
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SDRAM Data [14] 3.3 V DQ15 PIN_U9 Bidir SDRAM Data [15] 3.3 V DQM0 PIN_U13 Output SDRAM Lower Data Mask 3.3 V DQM1 PIN_U14 Output SDRAM Upper Data Mask 3.3 V CYC5000 User Guide www.arrow.com Page | 15 March 2023...
3.3.4 CRUVI HS Connector The CYC5000 board has one CRUVI HS connector. CRUVI HS is an open ecosystem which makes it possible to add a big variety of interfaces to the system, that can require high-speed signalling as well as low-speed device interface support.
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1.8 V / Differential Transmitter A[7]_n 3.3 V SMB_ALERT PIN_G17 Input SMBus interrupt signal 3.3 V SMB_SDA PIN_H18 Bidir SMBus Data Line 3.3 V SMB_SCL PIN_F17 Output SMBus Data Clock Line 3.3 V CYC5000 User Guide www.arrow.com Page | 17 March 2023...
- VSEL = ‘1’; ADJ = 3.3V 3.3.5 Arduino Header The CYC5000 board offers connectivity to classic Arduino MKR compatible shields that could also alternatively be used as GPIOs. The MKR connectors offer up to 23 digital I/Os. Figure 10 - Arduino Header Connections CYC5000 User Guide www.arrow.com...
There are eight red user-controllable LEDs connected to the FPGA. Each LED is driven directly and individually by the Cyclone V FPGA, driving its associated pin to a high logic level for on or low logic level for off. CYC5000 User Guide www.arrow.com Page | 19...
3.3 V 3.3.7 Push Buttons The board has two push buttons connected to the FPGA. Push buttons drive their associated pins low logic level when pressed and high logic level when released. CYC5000 User Guide www.arrow.com Page | 20 March 2023...
3.3 V 3.3.8 Power Tree The CYC5000 is powered by MPM Power Modules which provide high efficiency on a small layout. As seen from the diagram below, the board can be powered either by a micro-USB connection or by user input voltage from the Arduino MKR header (takes precedence over the USB bus). All devices are powered by a 3.3V voltage line and the 5V and 3.3V lines are fed back to the Arduino...
Questa – Intel FPGA Edition • Intel Cyclone V device support • If the download page redirects you to the Software License Agreement page, accept the Legal Disclaimer, and the downloading will start automatically. CYC5000 User Guide www.arrow.com Page | 23 March 2023...
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When prompted to select the components, the installer will automatically detect the Cyclone V device support and Questa packages when they are in the same folder. Make sure these components are selected: CYC5000 User Guide www.arrow.com Page | 24 March 2023...
Arrow USB Programmer2 to be able to connect to the CYC5000 board. 4.2 Installing Arrow USB Programmer2 The CYC5000 board uses version 2 of the Arrow USB Programmer2 programming solution, that is an FTDI FT2232H Hi-Speed USB controller plus a programmer DLL. Since this FTDI USB controller is a very common standard device, usually no specific drivers are needed to make the CYC5000 work.
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DLL and adds some keys to the registry of the 4.2.3 After connecting the CYC5000 board to the PC, two unknown devices might appear in the “Other devices” section of device manager of the PC.
4.3.4 Set the seats and accept the terms of use this license. 4.3.5 Click on Get License button. 4.3.6 In the pop-up window select +New computer under Create a New Computer. CYC5000 User Guide www.arrow.com Page | 27 March 2023...
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In the Create Computer window, fill in the fields with your computer details and click on Generate License. The license file will be provided by email, or you can also download it under Intel FPGA Self-Service Licensing Center. CYC5000 User Guide www.arrow.com Page | 28 March 2023...
New Project with CYC5000 Creating a new Blinky Project with CYC5000 5.1.1 Launch Quartus Prime Lite Edition from the Start Menu. 5.1.2 In the Quartus Prime tool, create a new project: File -> New Project Wizard. The New Project Wizard walks you through the project settings, such as the name, directories, files, directories, device family and other settings.
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5.1.6 Project Type In this page you choose the Project Type. In this tutorial, a new project will be created, and thus the default settings of empty project should be selected. CYC5000 User Guide www.arrow.com Page | 30 March 2023...
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For other designs, files could be added here. 5.1.9 Click “Next”. 5.1.10 Select the Device Part Number of the CYC5000 Board In the Family and Device Settings, use the pull-down menu to select the family as Cyclone V. Then in the Name Filter enter 5CEBA2U15C8.
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5.1.13 Click “Next”. 5.1.14 Project Summary Page This is the Summary Page that shows the settings Quartus Prime will use for this Project. Those settings can be changed if required later. CYC5000 User Guide www.arrow.com Page | 32 March 2023...
5.1.15 Click “Finish”. Building a Blinky Project with CYC5000 Overview: In this section you will create the components to a design, make connections, set the pins, and compile a project. The goal is to go through the design process of a simple blinky project, where the toggle speed of the LEDs could be controlled by one of the pushbuttons of the CYC5000.
PLL or type in the search field for “PLL”. 5.2.4.1 In the Search bar of the IP Catalog, type “pll” and select PLL Intel FPGA IP which stands for Altera Phase Locked Loop. CYC5000 User Guide www.arrow.com Page | 34 March 2023...
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On the General tab, make sure that “Integer-N PLL“ is set for PLL mode and enter the PLL reference clock frequency to match the clock input on the CYC5000 Board. We have 12 MHz clock signal coming into the FPGA, so we will use 12MHz for the Reference Clock Frequency.
Click “Exit” to close it. 5.2.5 Create and Configure the Counter The next step is to create the counter which will drive the LEDs on the CYC5000 board. 5.2.5.1 To create this counter, select the IP Catalog and expand the Basic Functions →...
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LEDs toggling. 5.2.5.6 Change this number to 32. 5.2.5.7 Let the counter to be Up only, so the LEDs will show the counters counting up. CYC5000 User Guide www.arrow.com Page | 37 March 2023...
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5.2.5.8 Select “Next” until reaching Page 5. 5.2.5.9 Select simple_counter.bsf checkbox to generate a symbol for our schematic design. 5.2.5.10 Click “Finish”. The counter is now created. CYC5000 User Guide www.arrow.com Page | 38 March 2023...
The next step is to create a mux component. This mux will be used along with a push button on the CYC5000 board to control the speed of the counter, where the counter outputs will be seen on the LEDs.
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5.2.6.6 Click “Next” until Page 3. 5.2.6.7 Select counter_mux.bsf checkbox to generate a symbol for our schematic design. 5.2.6.8 Click “Finish”. CYC5000 User Guide www.arrow.com Page | 40 March 2023...
To do so, select File menu, then click on New and select Block Diagram/Schematic File. 5.2.7.2 Click “OK”. A new schematic will be created, where the components can be added. 5.2.7.3 Right click on the schematic page and select Insert → Symbol… as seen below. CYC5000 User Guide www.arrow.com Page | 41 March 2023...
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5.2.7.9 Repeat the step 5.2.7.3 but this time expand the Quartus folder, and search for primitives → other, and select “gnd”. CYC5000 User Guide www.arrow.com Page | 42 March 2023...
5.2.8 Connecting the Components Next step is to make the proper connections between the components we just added to the schematic. 5.2.8.1 Select the “Node Tool”. CYC5000 User Guide www.arrow.com Page | 43 March 2023...
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Select the “Bus Tool”. 5.2.8.5 Using the bus tool create a connection coming out of the simple_counter and one connection for each of the inputs of the counter_mux as show below. CYC5000 User Guide www.arrow.com Page | 44 March 2023...
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The view of the “Bus Properties” should look like this: 5.2.8.7 Click “OK”. 5.2.8.8 Do the same for input buses of the mux: Name the top bus input: data1x[7..0] → counter[24..31] CYC5000 User Guide www.arrow.com Page | 45 March 2023...
Name the bottom bus input: data0x[7..0] → counter[19..26] Schematic should look like this: 5.2.9 Add inputs, outputs to the schematic 5.2.9.1 Click on the “Pin Tool” as show below and select “Input”. CYC5000 User Guide www.arrow.com Page | 46 March 2023...
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FPGA. 5.2.9.4 Rename the pin_name2 to USER_BTN by double clicking its current name. This is going to be one of the user buttons of the CYC5000 board to select the mux. 5.2.9.5 Using the “Node Tool” connect: CLK12M →...
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Looking at the schematic, even though the buses are not connected together by wires, the names of counter tell Quartus Prime to connect the signals together. Overall, the user button will toggle between displaying higher 8 bits of the counter and 8 lower bits CYC5000 User Guide www.arrow.com Page | 48...
Constraints are required in every CPLD/FPGA design. 5.2.11.1 To add the timing constraints, select File → New and under the “Other File” section, select “Synopsys Design Constraints File” and select “OK”. CYC5000 User Guide www.arrow.com Page | 49 March 2023...
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The I/Os of this design are trivial, so they can be ignored in the Timing Analysis. 5.2.11.3 Use File → Save to save it as top.sdc. CYC5000 User Guide www.arrow.com Page | 50 March 2023...
Pin Planner can be used. If many pins are needed, other ways can be used such as the Quartus Assignment Editor, or by importing constraints from a text file or spreadsheet. 5.2.12.1 Open the Pin Planner: Assignments → Pin Planner. CYC5000 User Guide www.arrow.com Page | 51 March 2023...
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CLK12M to PIN_F14. Note that the Location of the CLK12M is now set to Location PIN_F14 (as seen in blue colour in the top view of the FPGA). CYC5000 User Guide www.arrow.com Page | 52 March 2023...
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5.2.12.5 The specific pins are now selected, but the I/O standards now need to be set as well. The button, LEDS, and clock pins are the same I/O standard for CYC5000 since all banks* and peripherals are powered by 3.3V. The USER_BTN, the LEDs and clock pins are 3.3-V LVTTL.
Open Assignments → Device → Device and Pin Options → Voltage and set Default I/O Standard to “3.3-V LVTTL” and press “OK” to all the windows. CYC5000 User Guide www.arrow.com Page | 54...
100% indication along with the compile time in the right bottom corner. 5.2.14 Reading the Compilation Report After successfully compiling the design, a Compilation Report should appear as shown above: CYC5000 User Guide www.arrow.com Page | 55 March 2023...
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Most notable reports in this folder are the maximum frequency the design can achieve, setup and hold slack, unconstrained paths in case they were missed, etc. CYC5000 User Guide www.arrow.com Page | 56...
Configure the FPGA in JTAG mode 6.1.1 Connect your CYC5000 board to your PC using an USB cable. Since the Arrow USB Blaster should be already installed, the Window’s Device Manager should display the following entries are highlighted in red (port number may differ depending on your PC). If the Arrow USB Blaster is not installed, please refer to Chapter 4.2...
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Otherwise, continue from step 6.1.12. 6.1.5 To add hardware, click Hardware Setup… and double click Arrow-USB-Blaster entry in the Hardware Setup tab. The Currently selected hardware should now show Arrow-USB- Blaster [USB0] (depending on your PC, the USB port number may vary).
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6.1.7 Make sure the hardware setup is Arrow-USB-Blaster [USB0] and the mode is JTAG. If the Mode is not set to JTAG, click on it, and select JTAG from the drop-down menu. 6.1.8 To add the device, click “Auto Detect” on the left side of the Programmer.
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Make sure the Programmer shows the correct file and correct part in the JTAG chain and check the Program/Configure checkbox. 6.1.13 Click Start to program the CYC5000. When the configuration is complete, the Progress bar should reach 100% (Successful). The design is now programmed to the FPGA.
(.jic). This configuration data is automatically loaded from the serial configuration flash into the Cyclone V device when the board is powered up. 6.2.1 Programming File generation 6.2.1.1 In Quartus Prime, go to File → Convert Programming Files... CYC5000 User Guide www.arrow.com Page | 61 March 2023...
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6.2.1.4 Select Cyclone V for the Device family, Active Serial x4 for Configuration mode, and choose EPCQ64A from the Configuration device tab. Although the CYC5000 board has a Winbond QSPI flash memory, the use and control of this memory are completely identical to Intel EPCQ-A. Accordingly, instead of adding a new Configuration device to Quartus, simply selecting EPCQ64A is sufficient.
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6.2.1.9 Select SOF Data under Input files to convert and click on Add File… button. 6.2.1.10 Go to <project_directory>/output_files/ and open top.sof. 6.2.1.11 Make sure that your settings are same as the picture below and if everything is correct. CYC5000 User Guide www.arrow.com Page | 63 March 2023...
6.2.1.12 Click “Generate”. 6.2.1.13 Click “OK“ on the successful file generation notification and close Convert Programming File window. 6.2.2 Device Programming 6.2.2.1 Open Programmer. 6.2.2.2 Select output_files/top.sof and click Change File… button. CYC5000 User Guide www.arrow.com Page | 64 March 2023...
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When you add the .jic file, the Programmer will automatically update the JTAG chain and put the configuration flash memory. 6.2.2.4 Make sure the Programmer shows the correct file and correct parts in the JTAG chain. Check the Program/Configure checkbox. CYC5000 User Guide www.arrow.com Page | 65 March 2023...
FPGA and automatically loads the configuration from QSPI. Testing the Design Does not matter which way the CYC5000 board was configured, the results should be the same for both methods, with the only difference being if configuration is retained after power off.
In some rare cases when using Windows 10 operating system, the programmer DLL is not properly loaded/unloaded, causing the Quartus Programmer to not detect the Arrow USB Programmer2. Solution: Restart the Altera JTAG Server using the Services application of Windows. CYC5000 User Guide www.arrow.com Page | 67 March 2023...
Your sole risk. WARRANTY Arrow warrants that it has the right to provide the evaluation board to you. This warranty is provided by Arrow in lieu of all other warranties, written or oral, statutory, express or implied, including any warranty as to merchantability, non-infringement, fitness for any particular purpose, or uninterrupted or error-free operation, all of which are expressly disclaimed.
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IDENTIFICATION You shall, at Your expense, defend Arrow and its Affiliates and Licensors against a claim or action brought by a third party for infringement or misappropriation of any patent, copyright, trade...
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