Summary of Contents for Arrow Everest-CortexM1-SFP+Loop-Demo
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Everest-CortexM1-SFP+Loop-Demo Getting Started created: S. Rieche Date 2018-02-19 Project: Everest-CortexM1-SPF+Loop-Demo Getting Started edited: S. Rieche Date: 2018-06-18 approved: Date: Filename: Everest-CortexM1-SPF+Loop-Demo--Getting_Started_1p1.docx Arrow Central Europe GmbH Version: Page 1 of 19...
Arrow Central Europe GmbH page 5 User Guide Everest-CortexM1-Demo 1. Revision History The revision history describes the changes that were implemented in the document. The changes are listed by revision, starting with the most current publication. Revision 1.1 The document was updated for Libero SoC PolarFire v2.2.
Arrow Central Europe GmbH page 6 User Guide Everest-CortexM1-Demo 2. Getting Started This demo design implements a SFP+ loop based on the Cortex M1 Demo design, offering a soft processor subsystem with GPIO’s, UART and I2C functionality. Internal SRAM blocks are used for both, program and data memory.
Arrow Central Europe GmbH page 7 User Guide Everest-CortexM1-Demo Handling the Board Pay attention to the following points while handling or operating the board: Handle the board with electrostatic discharge (ESD) precautions to avoid damage. For information about ESD precautions see https://www.microsemi.com/documentportal/doc_view/126483-esd-appnote.
Arrow Central Europe GmbH page 9 User Guide Everest-CortexM1-Demo Figure 1: Everest Board Powering up the Board Insert the Finisar Optical Transceiver into the J1 connector (SFP+ module cage). A loop has to be built by connecting the transmitter with the receiver with an optical fiber cable. The Everest DEV Board is powered up using the 12 V DC jack.
Arrow Central Europe GmbH page 10 User Guide Everest-CortexM1-Demo 3. Demo Design SFP+ related differences between Everest DEV Board PROTO and Revision A and B On Everest DEV Board PROTO the SFP+ signals RX_LOS, RS0, RS1, TX_DIS and TX_FAULT could only be accessed via the I2C I/O expander PCA9538 that is connected to the same I2C bus as the SFP+ interface itself.
Arrow Central Europe GmbH page 11 User Guide Everest-CortexM1-Demo On Everest DEV Board Rev. A and B these signals are routed directly to GPIOs. Figure 3: SFP+ hardware Everest DEV Board Rev. A and B...
Arrow Central Europe GmbH page 12 User Guide Everest-CortexM1-Demo Prerequisites Software and IP core requirements are the same for Everest DEV Board PROTO and Rev. A and B. Table 1: Software / IP Requirements Software Version Libero SoC PolarFire V2.2 Synplify Pro L2017.09M-SP1-1...
Arrow Central Europe GmbH page 13 User Guide Everest-CortexM1-Demo Design Implementation The following table lists the clock frequencies used in the design. Table 2: Hardware Design Clock Frequencies Clock Frequency (MHz) PF_OSC PF_CCC OUT0_FABCLK 27.5 HCLK / PCLK 27.5 PF_TX_PLL 156.25...
Arrow Central Europe GmbH page 14 User Guide Everest-CortexM1-Demo Figure 5: Design Implementation – Top Level Everest DEV Board Rev. A and B The implementation of submodule PF_XCVR_8b10b is the same for all revisions. Figure 6: Design Implementation – Modul PF_XCVR_8b10b...
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Arrow Central Europe GmbH page 15 User Guide Everest-CortexM1-Demo The design is already fully implemented and ready to be programmed on the Everest Board. The board has to be connected with the power supply and to the PC with the USB cable. All...
Arrow Central Europe GmbH page 16 User Guide Everest-CortexM1-Demo Running the Design In Order to run the design, the CortexM1-Processor has to be loaded with the firmware. To do so, load the provided SoftConsole Workspace. Figure 7: SoftConsole v5.1 workspace launcher Figure 8: SoftConsole v5.1 - starting the debug session...
Arrow Central Europe GmbH page 18 User Guide Everest-CortexM1-Demo Figure 10: terminal output after startup Any character entered in terminal 1 will be looped through the fiber of the SFP+. The output of terminal 0 shows the contend of the receiver module. Every line starts with the comma character “BC”...
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