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Arrow BeMicro CV A9 Hardware Reference Manual

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BeMicro CV A9
FPGA Development Board
Hardware Reference Guide
Altera's 28nm Low Cost FPGA Solution
v1.2
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Summary of Contents for Arrow BeMicro CV A9

  • Page 1 BeMicro CV A9 FPGA Development Board Hardware Reference Guide Altera's 28nm Low Cost FPGA Solution v1.2 Arrow.com. Downloaded from...

  • Page 2: Table Of Contents

    Micro SD Card ........................... 15 40 Pin Prototyping Headers ...................... 16 80 Pin Card Edge Connector...................... 19 Power Supply ..........................22 Additional Information ......................23 Board Revision History ......................23 Document Revision History ....................... 24 Arrow.com. Arrow.com. Downloaded from Downloaded from...

  • Page 3: Overview

    Arrow BeScope digital oscilloscope, SDRstick SDR front-end boards, and the Terasic MTL LCD module. For a complete list of products compatible with BeMicro CV A9 board, see the BeMicro CV A9 Partner Pack at http://www.arrow.com/bemicro. Users can easily migrate existing designs from BeMicro SDK or BeMicro CV to BeMicro CV A9.

  • Page 4: Board Component Features

    Board Component Features The BeMicro CV A9 board features the following major component blocks:  Cyclone V E FPGA (5CEFA9F23C8N) in a 484-pin FineLine BGA (FBGA) • 113,560 adaptive logic modules (ALMs) equivalent to 301,000 LEs • 12,200 Kbit (Kb) M10K and 1,717 Kb MLAB memory •...

  • Page 5: Development Board Block Diagram

    Development Board Block Diagram Figure 1-1 shows a block diagram of the BeMicro CV A9 FPGA development board. Figure 1-1: BeMicro CV A9 Block Diagram Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Downloaded from Downloaded from Downloaded from Downloaded from Downloaded from...
  • Page 6 Figure 1-2 shows a top view of the BeMicro CV A9 FPGA development board. Figure 1-2: Top View of BeMicro CV A9 Development Board. Figure 1-3 shows a bottom view of the BeMicro CV A9 FPGA development board. Figure 1-3: Bottom View BeMicro CV A9 Development Board Arrow.com.

  • Page 7: Handling The Board

    2. Board Components This chapter introduces the major components on the Be Micro CV A9 FPGA development board. Figure 2-1 and Figure 2-2 illustrate the component locations. Figure 2-1: Major component locations, Top View Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com.
  • Page 8 • Ethernet Interface • EEPROM • Micro SD Card • 40 Pin Prototyping Headers • 80 Pin Card Edge Connector • Power Supply Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Downloaded from Downloaded from Downloaded from Downloaded from Downloaded from...

  • Page 9: Cyclone V E Fpga

    The PROM supports the AS x4 configuration mode. By default, the BeMicro CV A9 board is set up to configure via AS x 4 configuration mode. Resistors R97 and R98 allow selection between AS Fast and AS Standard modes.

  • Page 10: Clock Circuitry

    FPGA I/O. Driving the FPGA output to a logic 0 will illuminate the LED. Driving a logic 1 turns it off. Table 2–3 lists the LED board references, schematic signal names, and functional descriptions. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com.
  • Page 11 Cyclone V E FPGA pin numbers. Table 2-4: User-defined Push-button Board Reference Information Board Reference FPGA Pin Number Schematic Signal Name I/O Standard TACT1 1.5V TACT2 1.5V Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com.

  • Page 12: Ddr3 Memory

    Speed Grade of Controller (MHz) Table 2–7 lists the DDR3 pin assignments, signal names, and functions. The signal names and types are relative to the Cyclone V E FPGA in terms of I/O setting and direction. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com.
  • Page 13 1.5V SSTL Class I Data bus bit 3, byte lane 0 DDR3_DQ4 1.5V SSTL Class I Data bus bit 4, byte lane 0 DDR3_DQ5 1.5V SSTL Class I Data bus bit 5, byte lane 0 Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com.

  • Page 14: Ethernet Interface

    Write Enable Ethernet Interface The BeMicro CV A9 board includes a Micrel KSZ9021 10/100/1000 Ethernet PHY and RJ45 connector. Altera’s Triple Speed Ethernet MAC soft IP core can be implemented inside the Cyclone V FPGA to connect to the PHY through its RGMII interface.

  • Page 15: Eeprom

    Note 1: I/O voltage for this interface is selectable using the VCCIO_SEL jumper Micro SD Card The BeMicro CV A9 board includes a Micro SD card slot with x4 data interface to the FPGA. Table 2–10 lists the FPGA pin assignments, signal names, and functions for the Micro SD card.

  • Page 16: Pin Prototyping Headers

    Note 1: I/O voltage for this interface is selectable using the VCCIO_SEL jumper 40 Pin Prototyping Headers The BeMicro CV A9 board includes two 2×20 prototyping headers. The FPGA user I/O pins are routed directly to the headers for design testing, debugging, verification and prototyping.
  • Page 17 DIFF_RX_P2 2.5 V or 3.3 V DIFF_RX_N2 2.5 V or 3.3 V DIFF_RX_P1 2.5 V or 3.3 V DIFF_RX_N1 Note 1: I/O voltage for this interface is selectable using the VCCIO_SEL jumper Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com.
  • Page 18 2.5 V or 3.3 V LVDS_TX_E_N4 2.5 V or 3.3 V LVDS_TX_E_P4 2.5 V or 3.3 V LVDS_TX_E_N3 2.5 V or 3.3 V AA10 GPIO_C 2.5 V or 3.3 V Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com.

  • Page 19: Pin Card Edge Connector

    Ensure that any card you connect to the BeMicro 80 Pin Card Edge Connector is intended for that particular BeMicro variant. For further guidance, consult the add-on card’s documentation, along with the BeMicro CV A9 Schematic at https://parts.arrow.com/item/detail/arrow-development-tools/bemicrocva9 Table 2–13 lists the card edge connector J2 pin assignments, signal names, and functions.
  • Page 20 2.5 V or 3.3 V AA18 EG_P14 2.5 V or 3.3 V EG_P47 2.5 V or 3.3 V AA19 EG_P15 2.5 V or 3.3 V EG_P48 2.5 V or 3.3 V Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com.
  • Page 21 2.5 V or 3.3 V EG_P28 2.5 V or 3.3 V EG_P60 2.5 V or 3.3 V EG_P29 2.5 V or 3.3 V No Connect No Connect No Connect No Connect Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com.

  • Page 22: Power Supply

    2.5 or 3.3 FPGA I/O bank power (Banks 3A, 3B, 4A, 5B), I/O pre-driver power (Banks 3A, 3B, 5A, 5B) The BeMicro CV A9 board supports VCCIO of 2.5V or 3.3V for I/O Banks 3A, 3B, 4A and 5B. Arrow.com. Arrow.com.

  • Page 23: Additional Information

    Connect pins 1 and 2 3. Additional Information This chapter provides additional information about the document. Board Revision History The following table lists the versions of all releases of the Arrow Electronics BeMicro CV A9 Cyclone V FPGA Development Board. Release Date Version...

  • Page 24: Document Revision History

    Updated pin descriptions in Table 2-8; other minor updates & corrections July 2015 Updated Table 2-11; corrected GPIO7 pin number For more information on the BeMicro CV A9 Cyclone V E Development Board, visit https://parts.arrow.com/item/detail/arrow-development-tools/bemicrocva9 http://www.alterawiki.com/wiki/BeMicro_CV_A9 Arrow.com. Arrow.com. Arrow.com. Arrow.com.

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